[Fast-ISel] Clear kill flags on registers replaced by updateValueMap.

[oota-llvm.git] / test / CodeGen / PowerPC / pr22711.ll

diff --git a/test/CodeGen/PowerPC/pr22711.ll b/test/CodeGen/PowerPC/pr22711.ll
index 56c9173a7321f3b3f151d275d757a3129dfb12c5..fb1e971d4416084e18b7125fa4d42c6b783206ef 100644 (file)
--- a/test/CodeGen/PowerPC/pr22711.ll
+++ b/test/CodeGen/PowerPC/pr22711.ll
@@ -6,10 +6,10 @@ define void @test(i32* %a) {
 entry:
   %a.addr = alloca i32*, align 8
   store i32* %a, i32** %a.addr, align 8
-  %0 = load i32** %a.addr, align 8
-  %incdec.ptr = getelementptr inbounds i32* %0, i32 1
+  %0 = load i32*,  i32** %a.addr, align 8
+  %incdec.ptr = getelementptr inbounds i32, i32* %0, i32 1
   store i32* %incdec.ptr, i32** %a.addr, align 8
-  %1 = load i32* %0, align 4
+  %1 = load i32,  i32* %0, align 4
   switch i32 %1, label %sw.epilog [
     i32 17, label %sw.bb
     i32 13, label %sw.bb1
@@ -21,37 +21,37 @@ entry:
   ]
 
 sw.bb:                                            ; preds = %entry
-  %2 = load i32** %a.addr, align 8
+  %2 = load i32*,  i32** %a.addr, align 8
   store i32 2, i32* %2, align 4
   br label %sw.epilog
 
 sw.bb1:                                           ; preds = %entry
-  %3 = load i32** %a.addr, align 8
+  %3 = load i32*,  i32** %a.addr, align 8
   store i32 3, i32* %3, align 4
   br label %sw.epilog
 
 sw.bb2:                                           ; preds = %entry
-  %4 = load i32** %a.addr, align 8
+  %4 = load i32*,  i32** %a.addr, align 8
   store i32 5, i32* %4, align 4
   br label %sw.epilog
 
 sw.bb3:                                           ; preds = %entry
-  %5 = load i32** %a.addr, align 8
+  %5 = load i32*,  i32** %a.addr, align 8
   store i32 7, i32* %5, align 4
   br label %sw.epilog
 
 sw.bb4:                                           ; preds = %entry
-  %6 = load i32** %a.addr, align 8
+  %6 = load i32*,  i32** %a.addr, align 8
   store i32 11, i32* %6, align 4
   br label %sw.epilog
 
 sw.bb5:                                           ; preds = %entry
-  %7 = load i32** %a.addr, align 8
+  %7 = load i32*,  i32** %a.addr, align 8
   store i32 13, i32* %7, align 4
   br label %sw.epilog
 
 sw.bb6:                                           ; preds = %entry
-  %8 = load i32** %a.addr, align 8
+  %8 = load i32*,  i32** %a.addr, align 8
   store i32 17, i32* %8, align 4
   br label %sw.epilog
 
@@ -63,3 +63,16 @@ sw.epilog:                                        ; preds = %entry, %sw.bb6, %sw
 ; CHECK: AddressAlignment: 8
 ; CHECK: Name: .rela.toc
 
+; This test was generated from the following from PR22711:
+
+;void test(int *a) {
+;  switch (*a++) {
+;  case 17: *a =  2; break;
+;  case 13: *a =  3; break;
+;  case 11: *a =  5; break;
+;  case  7: *a =  7; break;
+;  case  5: *a = 11; break;
+;  case  3: *a = 13; break;
+;  case  2: *a = 17; break;
+;  }
+;}