[Target/X86] Don't use callee-saved registers in a Win64 tail call on non-Windows.

[oota-llvm.git] / test / CodeGen / PowerPC / fast-isel-cmp-imm.ll

diff --git a/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll b/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
index 33f7a79783ccae7b0b1e30c61aece4bc25f44828..5a9d15868b6b73d6671705f845fd7f7c6212c959 100644 (file)
--- a/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
+++ b/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
@@ -1,5 +1,8 @@
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
-
+; FIXME: FastISel currently returns false if it hits code that uses VSX
+; registers and with -fast-isel-abort=1 turned on the test case will then fail.
+; When fastisel better supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
 define void @t1a(float %a) uwtable ssp {
 entry:
 ; ELF64: t1a
@@ -198,7 +201,7 @@ define void @t12(i8 %a) uwtable ssp {
 entry:
 ; ELF64: t12
   %cmp = icmp ugt i8 %a, -113
-; ELF64: rlwinm
+; ELF64: clrlwi
 ; ELF64: cmplwi
   br i1 %cmp, label %if.then, label %if.end