AMDGPU: Rework how private buffer passed for HSA

[oota-llvm.git] / test / CodeGen / PowerPC / and-elim.ll

diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll
index d49672d8ce4f5b4a28004ffc5b95008f06c937df..f1738b2c1517c013cc45919e2f07dd9b7964c8d3 100644 (file)
--- a/test/CodeGen/PowerPC/and-elim.ll
+++ b/test/CodeGen/PowerPC/and-elim.ll
@@ -1,18 +1,18 @@
-; RUN: llvm-as < %s | llc -march=ppc32 &&
-; RUN: llvm-as < %s | llc -march=ppc32 | not grep rlwin
+; RUN: llc < %s -march=ppc32 | not grep rlwin
 
-void %test(ubyte* %P) {
-       %W = load ubyte* %P
-       %X = shl ubyte %W, ubyte 1
-       %Y = add ubyte %X, 2
-       %Z = and ubyte %Y, 254        ; dead and
-       store ubyte %Z, ubyte* %P
+define void @test(i8* %P) {
+       %W = load i8, i8* %P
+       %X = shl i8 %W, 1
+       %Y = add i8 %X, 2
+       %Z = and i8 %Y, 254        ; dead and
+       store i8 %Z, i8* %P
        ret void
 }
 
-ushort %test2(ushort %crc) { ; No and's should be needed for the ushorts here.
-        %tmp.1 = shr ushort %crc, ubyte 1
-        %tmp.7 = xor ushort %tmp.1, 40961
-        ret ushort %tmp.7
+define zeroext i16 @test2(i16 zeroext %crc)  { 
+        ; No and's should be needed for the i16s here.
+        %tmp.1 = lshr i16 %crc, 1
+        %tmp.7 = xor i16 %tmp.1, 40961
+        ret i16 %tmp.7
 }