Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.

[oota-llvm.git] / test / CodeGen / PowerPC / Frames-large.ll

diff --git a/test/CodeGen/PowerPC/Frames-large.ll b/test/CodeGen/PowerPC/Frames-large.ll
index 365322668604d058d6c835e9c21a744fe198bec3..fda2e4ff9ce9bb8dee566fc40370ab1522df6771 100644 (file)
--- a/test/CodeGen/PowerPC/Frames-large.ll
+++ b/test/CodeGen/PowerPC/Frames-large.ll
@@ -1,32 +1,52 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | not grep 'stw r31, 20(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'lis r0, -1' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'ori r0, r0, 32704' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'stwux r1, r1, r0' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'lwz r1, 0(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | not grep 'lwz r31, 20(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'stw r31, 20(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'lis r0, -1' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'ori r0, r0, 32704' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'stwux r1, r1, r0' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'lwz r1, 0(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'lwz r31, 20(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | not grep 'std r31, 40(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | grep 'lis r0, -1' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | grep 'ori r0, r0, 32656' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | grep 'stdux r1, r1, r0' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | grep 'ld r1, 0(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | not grep 'ld r31, 40(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'std r31, 40(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'lis r0, -1' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'ori r0, r0, 32656' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'stdux r1, r1, r0' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'ld r1, 0(r1)' &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | grep 'ld r31, 40(r1)'
-
-
-implementation
-
-int* %f1() {
-       %tmp = alloca int, uint 8191
-       ret int* %tmp
+; RUN: llvm-as < %s > %t.bc
+; RUN: llc < %t.bc -march=ppc32 | FileCheck %s -check-prefix=PPC32-NOFP
+; RUN: llc < %t.bc -march=ppc32 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-FP
+
+; RUN: llc < %t.bc -march=ppc64 | FileCheck %s -check-prefix=PPC64-NOFP
+; RUN: llc < %t.bc -march=ppc64 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-FP
+
+
+target triple = "powerpc-apple-darwin8"
+
+define i32* @f1() nounwind {
+        %tmp = alloca i32, i32 8191             ; <i32*> [#uses=1]
+        ret i32* %tmp
 }
+
+; PPC32-NOFP: _f1:
+; PPC32-NOFP:  lis r0, -1
+; PPC32-NOFP:  ori r0, r0, 32704
+; PPC32-NOFP:  stwux r1, r1, r0
+; PPC32-NOFP:  addi r3, r1, 68
+; PPC32-NOFP:  lwz r1, 0(r1)
+; PPC32-NOFP:  blr 
+
+; PPC32-FP: _f1:
+; PPC32-FP:    stw r31, 20(r1)
+; PPC32-FP:    lis r0, -1
+; PPC32-FP:    ori r0, r0, 32704
+; PPC32-FP:    stwux r1, r1, r0
+; ...
+; PPC32-FP:    lwz r1, 0(r1)
+; PPC32-FP:    lwz r31, 20(r1)
+; PPC32-FP:    blr 
+
+
+; PPC64-NOFP: _f1:
+; PPC64-NOFP:  lis r0, -1
+; PPC64-NOFP:  ori r0, r0, 32656
+; PPC64-NOFP:  stdux r1, r1, r0
+; PPC64-NOFP:  addi r3, r1, 116
+; PPC64-NOFP:  ld r1, 0(r1)
+; PPC64-NOFP:  blr 
+
+
+; PPC64-FP: _f1:
+; PPC64-FP:    std r31, 40(r1)
+; PPC64-FP:    lis r0, -1
+; PPC64-FP:    ori r0, r0, 32656
+; PPC64-FP:    stdux r1, r1, r0
+; ...
+; PPC64-FP:    ld r1, 0(r1)
+; PPC64-FP:    ld r31, 40(r1)
+; PPC64-FP:    blr