[PowerPC] Fix FrameIndex handling in SelectAddressRegImm

[oota-llvm.git] / test / CodeGen / PowerPC / 2007-04-30-InlineAsmEarlyClobber.ll

diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
index 2466f4fc8e9d559dbb14bbbef326a8bdee38fa23..53231b4f435e4ea454f5326658a81704bf1fc053 100644 (file)
--- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
+++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
@@ -1,9 +1,10 @@
-; RUN: llvm-as < %s | llc | grep {subfc r3,r5,r4}
-; RUN: llvm-as < %s | llc | grep {subfze r4,r2}
-; RUN: llvm-as < %s | llc -regalloc=local | grep {subfc r5,r2,r4}
-; RUN: llvm-as < %s | llc -regalloc=local | grep {subfze r2,r3}
+; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
 ; The first argument of subfc must not be the same as any other register.
 
+; CHECK: subfc [[REG:r.]],
+; CHECK-NOT: [[REG]]
+; CHECK: InlineAsm End
 ; PR1357
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
@@ -17,7 +18,7 @@ target triple = "powerpc-apple-darwin8.8.0"
 ;  return ((long long)Y << 32) | X;
 ;}
 
-define i64 @test(i32 %A, i32 %B, i32 %C) {
+define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
 entry:
        %Y = alloca i32, align 4                ; <i32*> [#uses=2]
        %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C )              ; <i32> [#uses=1]