[DAGCombine] Fix a bug in MergeConsecutiveStores.

[oota-llvm.git] / test / CodeGen / PowerPC / 2007-04-30-InlineAsmEarlyClobber.ll

diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
index 9c28da8dc4589729dce1ff3d15418a8e2c360237..017775781f7d9c519edb73aa254a3791909d9084 100644 (file)
--- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
+++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
@@ -1,6 +1,5 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc < %s -regalloc=local | FileCheck %s
-; RUN: llc < %s -regalloc=fast | FileCheck %s
+; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
 ; The first argument of subfc must not be the same as any other register.
 
 ; CHECK: subfc [[REG:r.]],
@@ -23,7 +22,7 @@ define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
 entry:
        %Y = alloca i32, align 4                ; <i32*> [#uses=2]
        %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C )              ; <i32> [#uses=1]
-       %tmp5 = load i32* %Y            ; <i32> [#uses=1]
+       %tmp5 = load i32, i32* %Y               ; <i32> [#uses=1]
        %tmp56 = zext i32 %tmp5 to i64          ; <i64> [#uses=1]
        %tmp7 = shl i64 %tmp56, 32              ; <i64> [#uses=1]
        %tmp89 = zext i32 %tmp4 to i64          ; <i64> [#uses=1]