[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.

[oota-llvm.git] / test / CodeGen / Mips / sll1.ll

diff --git a/test/CodeGen/Mips/sll1.ll b/test/CodeGen/Mips/sll1.ll
index b23808c4a885cc6c6d6ca17e5f6245fa1df1272d..93b814f944c5006cb3570f50b35674bc035e27dc 100644 (file)
--- a/test/CodeGen/Mips/sll1.ll
+++ b/test/CodeGen/Mips/sll1.ll
@@ -1,4 +1,4 @@
-; RUN: llc  -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
 
 @i = global i32 10, align 4
 @j = global i32 0, align 4
@@ -12,7 +12,7 @@ entry:
 ; 16:  sll     ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}
   store i32 %shl, i32* @j, align 4
   %1 = load i32, i32* @j, align 4
-  %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1)
+  %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0), i32 %1)
   ret i32 0
 }