[mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal error...

[oota-llvm.git] / test / CodeGen / Mips / msa / llvm-stress-s525530439.ll

diff --git a/test/CodeGen/Mips/msa/llvm-stress-s525530439.ll b/test/CodeGen/Mips/msa/llvm-stress-s525530439.ll
index a6e612f2aff59e281ed75de1053ae4eb68bb11ce..685c407d020ca6042d4a3e5ecd029868ff23b513 100644 (file)
--- a/test/CodeGen/Mips/msa/llvm-stress-s525530439.ll
+++ b/test/CodeGen/Mips/msa/llvm-stress-s525530439.ll
@@ -1,5 +1,5 @@
 ; RUN: llc -march=mips < %s
-; RUN: llc -march=mips -mattr=+MSA < %s
+; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
 
 ; This test originally failed for MSA with a
 ; `Num < NumOperands && "Invalid child # of SDNode!"' assertion.