; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp oeq float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ule.s $f12, $f13
; 64-C-DAG: movf $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.olt.s $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f14, $f12
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.olt.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f13, $f12
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ogt float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ult.s $f12, $f13
; 64-C-DAG: movf $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.ole.s $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f14, $f12
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.ole.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f13, $f12
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp oge float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.olt.s $f12, $f13
; 64-C-DAG: movt $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.olt.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f12, $f14
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.olt.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f12, $f13
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp olt float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ole.s $f12, $f13
; 64-C-DAG: movt $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.ole.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f12, $f14
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.ole.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f12, $f13
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ole float %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp one float %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp ord float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ueq float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movf $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ugt float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movf $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp uge float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ult float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ule float %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp une float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp uno float %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp oeq double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ule.d $f12, $f13
; 64-C-DAG: movf $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.olt.d $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f14, $f12
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.olt.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f13, $f12
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ogt double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ult.d $f12, $f13
; 64-C-DAG: movf $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.ole.d $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f14, $f12
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.ole.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f13, $f12
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp oge double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.olt.d $f12, $f13
; 64-C-DAG: movt $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.olt.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f12, $f14
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.olt.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f12, $f13
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp olt double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: c.ole.d $f12, $f13
; 64-C-DAG: movt $[[T0]], $1, $fcc0
-; 32-CMP-DAG: cmp.ole.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f12, $f14
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
-; 64-CMP-DAG: cmp.ole.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f12, $f13
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ole double %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp one double %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp ord double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ueq double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movf $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ugt double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movf $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f14, $f12
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp uge double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ult double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp ule double %a, %b
%2 = zext i1 %1 to i32
; 32-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 32-CMP-DAG: not $2, $[[T1]]
+; 32-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 32-CMP-DAG: andi $2, $[[T2]], 1
; 64-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f13
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
-; 64-CMP-DAG: not $2, $[[T1]]
+; 64-CMP-DAG: not $[[T2:[0-9]+]], $[[T1]]
+; 64-CMP-DAG: andi $2, $[[T2]], 1
%1 = fcmp une double %a, %b
%2 = zext i1 %1 to i32
; 64-C-DAG: movt $[[T0]], $1, $fcc0
; 32-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f14
-; 32-CMP-DAG: mfc1 $2, $[[T0]]
+; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 32-CMP-DAG: andi $2, $[[T1]], 1
; 64-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f13
-; 64-CMP-DAG: mfc1 $2, $[[T0]]
+; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
+; 64-CMP-DAG: andi $2, $[[T1]], 1
%1 = fcmp uno double %a, %b
%2 = zext i1 %1 to i32