llvm/test/CodeGen/AArch64/tailcall_misched_graph.ll: s/REQUIRE/REQUIRES/

[oota-llvm.git] / test / CodeGen / Mips / 2008-08-06-Alloca.ll

diff --git a/test/CodeGen/Mips/2008-08-06-Alloca.ll b/test/CodeGen/Mips/2008-08-06-Alloca.ll
index 5c55137627d611af45ec6baa9153ca57ab74375a..0d94b19e46291575a40bab8437dddfcfb7ed35e5 100644 (file)
--- a/test/CodeGen/Mips/2008-08-06-Alloca.ll
+++ b/test/CodeGen/Mips/2008-08-06-Alloca.ll
@@ -1,21 +1,15 @@
-; RUN: llc < %s -march=mips -regalloc=linearscan | grep {subu.*sp} | count 2
-
-; This test depends on a linearscan optimization, joining copies from reserved
-; registers.
-; After coalescing, copies from %SP remain.
-; They are handled by RALinScan::attemptTrivialCoalescing
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
+; RUN: llc -march=mips < %s | FileCheck %s
 
 define i32 @twoalloca(i32 %size) nounwind {
 entry:
-       alloca i8, i32 %size            ; <i8*>:0 [#uses=1]
-       alloca i8, i32 %size            ; <i8*>:1 [#uses=1]
-       call i32 @foo( i8* %0 ) nounwind                ; <i32>:2 [#uses=1]
-       call i32 @foo( i8* %1 ) nounwind                ; <i32>:3 [#uses=1]
-       add i32 %3, %2          ; <i32>:4 [#uses=1]
-       ret i32 %4
+; CHECK: subu ${{[0-9]+}}, $sp
+; CHECK: subu ${{[0-9]+}}, $sp
+  alloca i8, i32 %size    ; <i8*>:0 [#uses=1]
+  alloca i8, i32 %size    ; <i8*>:1 [#uses=1]
+  call i32 @foo( i8* %0 ) nounwind    ; <i32>:2 [#uses=1]
+  call i32 @foo( i8* %1 ) nounwind    ; <i32>:3 [#uses=1]
+  add i32 %3, %2    ; <i32>:4 [#uses=1]
+  ret i32 %4
 }
 
 declare i32 @foo(i8*)