Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default

[oota-llvm.git] / test / CodeGen / Hexagon / adde.ll

diff --git a/test/CodeGen/Hexagon/adde.ll b/test/CodeGen/Hexagon/adde.ll
index 9cee3e215d62fa7bf73cdb85a06af6e15d73216a..25160a8d3381c8cd63ffd92d6b856af99fb0703a 100644 (file)
--- a/test/CodeGen/Hexagon/adde.ll
+++ b/test/CodeGen/Hexagon/adde.ll
@@ -1,7 +1,7 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -disable-hsdr -hexagon-expand-condsets=0 -hexagon-bit=0 < %s | FileCheck %s
 
-; CHECK: r{{[0-9]+:[0-9]+}} = #0
 ; CHECK: r{{[0-9]+:[0-9]+}} = #1
+; CHECK: r{{[0-9]+:[0-9]+}} = #0
 ; CHECK: r{{[0-9]+:[0-9]+}} = add(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
@@ -31,4 +31,4 @@ entry:
         %tmp2122 = trunc i128 %tmp21 to i64
         store i64 %tmp2122, i64* %RH
         ret void
-}
\ No newline at end of file
+}