Split ARM and AArch64 emutls.ll test

[oota-llvm.git] / test / CodeGen / ARM / widen-vmovs.ll

diff --git a/test/CodeGen/ARM/widen-vmovs.ll b/test/CodeGen/ARM/widen-vmovs.ll
index 679e3f434733c3362b5b690be31893379b0f7f9c..316cfabab48cb87485c05345d6bc2715e512e73d 100644 (file)
--- a/test/CodeGen/ARM/widen-vmovs.ll
+++ b/test/CodeGen/ARM/widen-vmovs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-code-place | FileCheck %s
+; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-block-placement | FileCheck %s
 target triple = "thumbv7-apple-ios"
 
 ; The 1.0e+10 constant is loaded from the constant pool and kept in a register.
@@ -17,7 +17,7 @@ target triple = "thumbv7-apple-ios"
 ; - Register liveness is verified.
 ; - The execution domain switch to vorr works across basic blocks.
 
-define void @Mm() nounwind {
+define void @Mm(i32 %in, float* %addr) nounwind {
 entry:
   br label %for.body4
 
@@ -27,10 +27,10 @@ for.body4:
 for.body.i:
   %tmp3.i = phi float [ 1.000000e+10, %for.body4 ], [ %add.i, %for.body.i ]
   %add.i = fadd float %tmp3.i, 1.000000e+10
-  %exitcond.i = icmp eq i32 undef, 41
+  %exitcond.i = icmp eq i32 %in, 41
   br i1 %exitcond.i, label %rInnerproduct.exit, label %for.body.i
 
 rInnerproduct.exit:
-  store float %add.i, float* undef, align 4
+  store float %add.i, float* %addr, align 4
   br label %for.body4
 }