ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.

[oota-llvm.git] / test / CodeGen / ARM / vst2.ll

diff --git a/test/CodeGen/ARM/vst2.ll b/test/CodeGen/ARM/vst2.ll
index 2180259d57f79f452dfbb9f526a573c665695cbc..17c8a4bdad9b4c2a25cad81e4e040f06cd7142b4 100644 (file)
--- a/test/CodeGen/ARM/vst2.ll
+++ b/test/CodeGen/ARM/vst2.ll
@@ -4,7 +4,7 @@ define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK-LABEL: vst2i8:
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vst2.8 {d16, d17}, [r0:64]
-       %tmp1 = load <8 x i8>* %B
+       %tmp1 = load <8 x i8>, <8 x i8>* %B
        call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8)
        ret void
 }
@@ -13,10 +13,10 @@ define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind {
 define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind {
 ;CHECK-LABEL: vst2i8_update:
 ;CHECK: vst2.8 {d16, d17}, [r1], r2
-       %A = load i8** %ptr
-       %tmp1 = load <8 x i8>* %B
+       %A = load i8*, i8** %ptr
+       %tmp1 = load <8 x i8>, <8 x i8>* %B
        call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4)
-       %tmp2 = getelementptr i8* %A, i32 %inc
+       %tmp2 = getelementptr i8, i8* %A, i32 %inc
        store i8* %tmp2, i8** %ptr
        ret void
 }
@@ -26,7 +26,7 @@ define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind {
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vst2.16 {d16, d17}, [r0:128]
        %tmp0 = bitcast i16* %A to i8*
-       %tmp1 = load <4 x i16>* %B
+       %tmp1 = load <4 x i16>, <4 x i16>* %B
        call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 32)
        ret void
 }
@@ -35,7 +35,7 @@ define void @vst2i32(i32* %A, <2 x i32>* %B) nounwind {
 ;CHECK-LABEL: vst2i32:
 ;CHECK: vst2.32
        %tmp0 = bitcast i32* %A to i8*
-       %tmp1 = load <2 x i32>* %B
+       %tmp1 = load <2 x i32>, <2 x i32>* %B
        call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
        ret void
 }
@@ -44,7 +44,7 @@ define void @vst2f(float* %A, <2 x float>* %B) nounwind {
 ;CHECK-LABEL: vst2f:
 ;CHECK: vst2.32
        %tmp0 = bitcast float* %A to i8*
-       %tmp1 = load <2 x float>* %B
+       %tmp1 = load <2 x float>, <2 x float>* %B
        call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
        ret void
 }
@@ -54,7 +54,7 @@ define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind {
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vst1.64 {d16, d17}, [r0:128]
        %tmp0 = bitcast i64* %A to i8*
-       %tmp1 = load <1 x i64>* %B
+       %tmp1 = load <1 x i64>, <1 x i64>* %B
        call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 32)
        ret void
 }
@@ -63,11 +63,11 @@ define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind {
 define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind {
 ;CHECK-LABEL: vst2i64_update:
 ;CHECK: vst1.64 {d16, d17}, [r1:64]!
-       %A = load i64** %ptr
+       %A = load i64*, i64** %ptr
        %tmp0 = bitcast i64* %A to i8*
-       %tmp1 = load <1 x i64>* %B
+       %tmp1 = load <1 x i64>, <1 x i64>* %B
        call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 8)
-       %tmp2 = getelementptr i64* %A, i32 2
+       %tmp2 = getelementptr i64, i64* %A, i32 2
        store i64* %tmp2, i64** %ptr
        ret void
 }
@@ -76,7 +76,7 @@ define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind {
 ;CHECK-LABEL: vst2Qi8:
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vst2.8 {d16, d17, d18, d19}, [r0:64]
-       %tmp1 = load <16 x i8>* %B
+       %tmp1 = load <16 x i8>, <16 x i8>* %B
        call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 8)
        ret void
 }
@@ -86,7 +86,7 @@ define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind {
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vst2.16 {d16, d17, d18, d19}, [r0:128]
        %tmp0 = bitcast i16* %A to i8*
-       %tmp1 = load <8 x i16>* %B
+       %tmp1 = load <8 x i16>, <8 x i16>* %B
        call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 16)
        ret void
 }
@@ -96,7 +96,7 @@ define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind {
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vst2.32 {d16, d17, d18, d19}, [r0:256]
        %tmp0 = bitcast i32* %A to i8*
-       %tmp1 = load <4 x i32>* %B
+       %tmp1 = load <4 x i32>, <4 x i32>* %B
        call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 64)
        ret void
 }
@@ -105,7 +105,7 @@ define void @vst2Qf(float* %A, <4 x float>* %B) nounwind {
 ;CHECK-LABEL: vst2Qf:
 ;CHECK: vst2.32
        %tmp0 = bitcast float* %A to i8*
-       %tmp1 = load <4 x float>* %B
+       %tmp1 = load <4 x float>, <4 x float>* %B
        call void @llvm.arm.neon.vst2.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
        ret void
 }
@@ -113,18 +113,18 @@ define void @vst2Qf(float* %A, <4 x float>* %B) nounwind {
 define i8* @vst2update(i8* %out, <4 x i16>* %B) nounwind {
 ;CHECK-LABEL: vst2update:
 ;CHECK: vst2.16 {d16, d17}, [r0]!
-       %tmp1 = load <4 x i16>* %B
+       %tmp1 = load <4 x i16>, <4 x i16>* %B
        tail call void @llvm.arm.neon.vst2.v4i16(i8* %out, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 2)
-       %t5 = getelementptr inbounds i8* %out, i32 16
+       %t5 = getelementptr inbounds i8, i8* %out, i32 16
        ret i8* %t5
 }
 
 define i8* @vst2update2(i8 * %out, <4 x float> * %this) nounwind optsize ssp align 2 {
 ;CHECK-LABEL: vst2update2:
 ;CHECK: vst2.32 {d16, d17, d18, d19}, [r0]!
-  %tmp1 = load <4 x float>* %this
+  %tmp1 = load <4 x float>, <4 x float>* %this
   call void @llvm.arm.neon.vst2.v4f32(i8* %out, <4 x float> %tmp1, <4 x float> %tmp1, i32 4) nounwind
-  %tmp2 = getelementptr inbounds i8* %out, i32  32
+  %tmp2 = getelementptr inbounds i8, i8* %out, i32  32
   ret i8* %tmp2
 }