[NVPTX] roll forward r239082

[oota-llvm.git] / test / CodeGen / ARM / vld2.ll

diff --git a/test/CodeGen/ARM/vld2.ll b/test/CodeGen/ARM/vld2.ll
index caa016e929d8f7187051625442c357d9613dd0a8..391b49152cd9a5f9a7fd69452a9c3d08db9b52dd 100644 (file)
--- a/test/CodeGen/ARM/vld2.ll
+++ b/test/CodeGen/ARM/vld2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
 
 %struct.__neon_int8x8x2_t = type { <8 x i8>,  <8 x i8> }
 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
@@ -12,7 +12,7 @@
 %struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
 
 define <8 x i8> @vld2i8(i8* %A) nounwind {
-;CHECK: vld2i8:
+;CHECK-LABEL: vld2i8:
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vld2.8 {d16, d17}, [r0:64]
        %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 8)
@@ -23,7 +23,7 @@ define <8 x i8> @vld2i8(i8* %A) nounwind {
 }
 
 define <4 x i16> @vld2i16(i16* %A) nounwind {
-;CHECK: vld2i16:
+;CHECK-LABEL: vld2i16:
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vld2.16 {d16, d17}, [r0:128]
        %tmp0 = bitcast i16* %A to i8*
@@ -35,7 +35,7 @@ define <4 x i16> @vld2i16(i16* %A) nounwind {
 }
 
 define <2 x i32> @vld2i32(i32* %A) nounwind {
-;CHECK: vld2i32:
+;CHECK-LABEL: vld2i32:
 ;CHECK: vld2.32
        %tmp0 = bitcast i32* %A to i8*
        %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0, i32 1)
@@ -46,7 +46,7 @@ define <2 x i32> @vld2i32(i32* %A) nounwind {
 }
 
 define <2 x float> @vld2f(float* %A) nounwind {
-;CHECK: vld2f:
+;CHECK-LABEL: vld2f:
 ;CHECK: vld2.32
        %tmp0 = bitcast float* %A to i8*
        %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
@@ -58,21 +58,21 @@ define <2 x float> @vld2f(float* %A) nounwind {
 
 ;Check for a post-increment updating load. 
 define <2 x float> @vld2f_update(float** %ptr) nounwind {
-;CHECK: vld2f_update:
+;CHECK-LABEL: vld2f_update:
 ;CHECK: vld2.32 {d16, d17}, [r1]!
-       %A = load float** %ptr
+       %A = load float*, float** %ptr
        %tmp0 = bitcast float* %A to i8*
        %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
        %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
        %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
        %tmp4 = fadd <2 x float> %tmp2, %tmp3
-       %tmp5 = getelementptr float* %A, i32 4
+       %tmp5 = getelementptr float, float* %A, i32 4
        store float* %tmp5, float** %ptr
        ret <2 x float> %tmp4
 }
 
 define <1 x i64> @vld2i64(i64* %A) nounwind {
-;CHECK: vld2i64:
+;CHECK-LABEL: vld2i64:
 ;Check the alignment value.  Max for this instruction is 128 bits:
 ;CHECK: vld1.64 {d16, d17}, [r0:128]
        %tmp0 = bitcast i64* %A to i8*
@@ -84,7 +84,7 @@ define <1 x i64> @vld2i64(i64* %A) nounwind {
 }
 
 define <16 x i8> @vld2Qi8(i8* %A) nounwind {
-;CHECK: vld2Qi8:
+;CHECK-LABEL: vld2Qi8:
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vld2.8 {d16, d17, d18, d19}, [r0:64]
        %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 8)
@@ -96,20 +96,20 @@ define <16 x i8> @vld2Qi8(i8* %A) nounwind {
 
 ;Check for a post-increment updating load with register increment.
 define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind {
-;CHECK: vld2Qi8_update:
+;CHECK-LABEL: vld2Qi8_update:
 ;CHECK: vld2.8 {d16, d17, d18, d19}, [r2:128], r1
-       %A = load i8** %ptr
+       %A = load i8*, i8** %ptr
        %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16)
         %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
         %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
         %tmp4 = add <16 x i8> %tmp2, %tmp3
-       %tmp5 = getelementptr i8* %A, i32 %inc
+       %tmp5 = getelementptr i8, i8* %A, i32 %inc
        store i8* %tmp5, i8** %ptr
        ret <16 x i8> %tmp4
 }
 
 define <8 x i16> @vld2Qi16(i16* %A) nounwind {
-;CHECK: vld2Qi16:
+;CHECK-LABEL: vld2Qi16:
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vld2.16 {d16, d17, d18, d19}, [r0:128]
        %tmp0 = bitcast i16* %A to i8*
@@ -121,7 +121,7 @@ define <8 x i16> @vld2Qi16(i16* %A) nounwind {
 }
 
 define <4 x i32> @vld2Qi32(i32* %A) nounwind {
-;CHECK: vld2Qi32:
+;CHECK-LABEL: vld2Qi32:
 ;Check the alignment value.  Max for this instruction is 256 bits:
 ;CHECK: vld2.32 {d16, d17, d18, d19}, [r0:256]
        %tmp0 = bitcast i32* %A to i8*
@@ -133,7 +133,7 @@ define <4 x i32> @vld2Qi32(i32* %A) nounwind {
 }
 
 define <4 x float> @vld2Qf(float* %A) nounwind {
-;CHECK: vld2Qf:
+;CHECK-LABEL: vld2Qf:
 ;CHECK: vld2.32
        %tmp0 = bitcast float* %A to i8*
        %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8* %tmp0, i32 1)