Generate correct asm info for mingw and cygwin ARM targets.

[oota-llvm.git] / test / CodeGen / ARM / vargs_align.ll

diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
index 1f2f05bd6086f4576b9623418144cec0678c2c68..6dc71352214bf4d32504bc16dc32e6de9921280d 100644 (file)
--- a/test/CodeGen/ARM/vargs_align.ll
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -1,21 +1,29 @@
-; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
-; RUN:   grep {add sp, sp, #16} | count 1
-; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
-; RUN:   grep {add sp, sp, #12} | count 2
+; RUN: llc < %s -mtriple=armv7-linux-gnueabihf | FileCheck %s -check-prefix=EABI
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
 
 define i32 @f(i32 %a, ...) {
 entry:
        %a_addr = alloca i32            ; <i32*> [#uses=1]
        %retval = alloca i32, align 4           ; <i32*> [#uses=2]
        %tmp = alloca i32, align 4              ; <i32*> [#uses=2]
-       "alloca point" = bitcast i32 0 to i32           ; <i32> [#uses=0]
        store i32 %a, i32* %a_addr
        store i32 0, i32* %tmp
-       %tmp1 = load i32* %tmp          ; <i32> [#uses=1]
+       %tmp1 = load i32, i32* %tmp             ; <i32> [#uses=1]
        store i32 %tmp1, i32* %retval
+       call void @llvm.va_start(i8* null)
+       call void asm sideeffect "", "~{d8}"()
        br label %return
 
 return:                ; preds = %entry
-       %retval2 = load i32* %retval            ; <i32> [#uses=1]
+       %retval2 = load i32, i32* %retval               ; <i32> [#uses=1]
        ret i32 %retval2
+; EABI: add sp, sp, #16
+; EABI: vpop {d8}
+; EABI: add sp, sp, #4
+; EABI: add sp, sp, #12
+
+; OABI: add sp, sp, #12
+; OABI: add sp, sp, #12
 }
+
+declare void @llvm.va_start(i8*) nounwind