ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2

[oota-llvm.git] / test / CodeGen / ARM / twoaddrinstr.ll

diff --git a/test/CodeGen/ARM/twoaddrinstr.ll b/test/CodeGen/ARM/twoaddrinstr.ll
index fc2aa1e568e2e922df22bbca0ad2456e97fc7d8c..97a49334b742e1218f0be3f71f1b3913a93cd555 100644 (file)
--- a/test/CodeGen/ARM/twoaddrinstr.ll
+++ b/test/CodeGen/ARM/twoaddrinstr.ll
@@ -1,9 +1,9 @@
 ; Tests for the two-address instruction pass.
-; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -arm-atomic-cfg-tidy=0 %s -o - | FileCheck %s
 
 define void @PR13378() nounwind {
 ; This was orriginally a crasher trying to schedule the instructions.
-; CHECK:      PR13378:
+; CHECK-LABEL:      PR13378:
 ; CHECK:        vld1.32
 ; CHECK-NEXT:   vst1.32
 ; CHECK-NEXT:   vst1.32
@@ -12,7 +12,7 @@ define void @PR13378() nounwind {
 ; CHECK-NEXT:   vst1.32
 
 entry:
-  %0 = load <4 x float>* undef, align 4
+  %0 = load <4 x float>, <4 x float>* undef, align 4
   store <4 x float> zeroinitializer, <4 x float>* undef, align 4
   store <4 x float> %0, <4 x float>* undef, align 4
   %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3