ARM VLDR/VSTR instructions don't need a size suffix.

[oota-llvm.git] / test / CodeGen / ARM / neon_ld1.ll

diff --git a/test/CodeGen/ARM/neon_ld1.ll b/test/CodeGen/ARM/neon_ld1.ll
index c78872a4bca222558137ab6875ae92eabeb5e463..c218ff523e27f30b58fe02fe0922daab2ce30a4a 100644 (file)
--- a/test/CodeGen/ARM/neon_ld1.ll
+++ b/test/CodeGen/ARM/neon_ld1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm -mattr=+neon | grep vldr.64 | count 4
-; RUN: llc < %s -march=arm -mattr=+neon | grep vstr.64
+; RUN: llc < %s -march=arm -mattr=+neon | grep vldr | count 4
+; RUN: llc < %s -march=arm -mattr=+neon | grep vstr
 ; RUN: llc < %s -march=arm -mattr=+neon | grep vmov
 
 define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind {