Align SP adjustment in function getSPAdjust

[oota-llvm.git] / test / CodeGen / ARM / mul.ll

diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll
index 77f94f087f30ed740eb1b251c9a54845a3259167..5e150b00172c9fd87d42496e3abec5c73ec5f703 100644 (file)
--- a/test/CodeGen/ARM/mul.ll
+++ b/test/CodeGen/ARM/mul.ll
@@ -1,15 +1,32 @@
-; RUN: llvm-as < %s | llc -march=arm &&
-; RUN: llvm-as < %s | llc -march=arm | grep "mul r0, r12, r0"  | wc -l | grep 1 &&
-; RUN: llvm-as < %s | llc -march=arm | grep "mul r0, r1, r0"  | wc -l | grep 1
+; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
 
-int %mul1(int %u) {
-entry:
-       %tmp = mul int %u, %u;
-       ret int %tmp
+define i32 @f1(i32 %u) {
+    %tmp = mul i32 %u, %u
+    ret i32 %tmp
 }
 
-int %mul2(int %u, int %v) {
-entry:
-       %tmp = mul int %u, %v;
-       ret int %tmp
+; CHECK: mul
+
+define i32 @f2(i32 %u, i32 %v) {
+    %tmp = mul i32 %u, %v
+    ret i32 %tmp
+}
+
+define i32 @f3(i32 %u) {
+       %tmp = mul i32 %u, 5
+        ret i32 %tmp
 }
+
+; CHECK: mul
+; CHECK: lsl
+
+define i32 @f4(i32 %u) {
+       %tmp = mul i32 %u, 4
+        ret i32 %tmp
+}
+
+; CHECK-NOT: mul
+
+; CHECK: lsl
+; CHECK-NOT: lsl
+