DebugInfo: Fix up some test cases to have more correct debug info metadata.

[oota-llvm.git] / test / CodeGen / ARM / lsr-scale-addr-mode.ll

diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
index f1678244f9926e8cee569f644b14a94d59793cca..948024163ba723c121aaccdafe52fda31064cd87 100644 (file)
--- a/test/CodeGen/ARM/lsr-scale-addr-mode.ll
+++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@ -1,7 +1,7 @@
-; RUN: llvm-as < %s | llc -march=arm | grep -F 'str r2, [r0, +r3, lsl #2]'
+; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
 ; Should use scaled addressing mode.
 
-define void @sintzero(i32* %a) {
+define void @sintzero(i32* %a) nounwind {
 entry:
        store i32 0, i32* %a
        br label %cond_next
@@ -17,3 +17,6 @@ cond_next:            ; preds = %cond_next, %entry
 return:                ; preds = %cond_next
        ret void
 }
+
+; CHECK: lsl{{.*}}#2]
+