[X86][SSE] Added tests for i8/i16 vector shifts

[oota-llvm.git] / test / CodeGen / ARM / ldr_ext.ll

diff --git a/test/CodeGen/ARM/ldr_ext.ll b/test/CodeGen/ARM/ldr_ext.ll
index d29eb022baceeb59931c80a5c3d4504babcdea3e..15efb50c9a9accf55a9cc9cb75c04e3904554acf 100644 (file)
--- a/test/CodeGen/ARM/ldr_ext.ll
+++ b/test/CodeGen/ARM/ldr_ext.ll
@@ -1,29 +1,29 @@
-; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
 
 define i32 @test1(i8* %t1) nounwind {
 ; CHECK: ldrb
-    %tmp.u = load i8* %t1
+    %tmp.u = load i8, i8* %t1
     %tmp1.s = zext i8 %tmp.u to i32
     ret i32 %tmp1.s
 }
 
 define i32 @test2(i16* %t1) nounwind {
 ; CHECK: ldrh
-    %tmp.u = load i16* %t1
+    %tmp.u = load i16, i16* %t1
     %tmp1.s = zext i16 %tmp.u to i32
     ret i32 %tmp1.s
 }
 
 define i32 @test3(i8* %t0) nounwind {
 ; CHECK: ldrsb
-    %tmp.s = load i8* %t0
+    %tmp.s = load i8, i8* %t0
     %tmp1.s = sext i8 %tmp.s to i32
     ret i32 %tmp1.s
 }
 
 define i32 @test4(i16* %t0) nounwind {
 ; CHECK: ldrsh
-    %tmp.s = load i16* %t0
+    %tmp.s = load i16, i16* %t0
     %tmp1.s = sext i16 %tmp.s to i32
     ret i32 %tmp1.s
 }
@@ -31,7 +31,7 @@ define i32 @test4(i16* %t0) nounwind {
 define i32 @test5() nounwind {
 ; CHECK: mov r0, #0
 ; CHECK: ldrsh
-    %tmp.s = load i16* null
+    %tmp.s = load i16, i16* null
     %tmp1.s = sext i16 %tmp.s to i32
     ret i32 %tmp1.s
 }