Be less conservative about forming IT blocks.

[oota-llvm.git] / test / CodeGen / ARM / ldr.ll

diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll
index 833668caf92ca277cd67d34a96eab024e0460f1f..bd4de5de669cd4d740ecfaf5cfd3865b49eda023 100644 (file)
--- a/test/CodeGen/ARM/ldr.ll
+++ b/test/CodeGen/ARM/ldr.ll
@@ -1,22 +1,71 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN:   grep {ldr r0} | count 3
+; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
 
-int %f1(int* %v) {
+define i32 @f1(i32* %v) {
+; CHECK-LABEL: f1:
+; CHECK: ldr r0
 entry:
-       %tmp = load int* %v             ; <int> [#uses=1]
-       ret int %tmp
+        %tmp = load i32, i32* %v
+        ret i32 %tmp
 }
 
-int %f2(int* %v) {
+define i32 @f2(i32* %v) {
+; CHECK-LABEL: f2:
+; CHECK: ldr r0
 entry:
-       %tmp2 = getelementptr int* %v, int 1023         ; <int*> [#uses=1]
-       %tmp = load int* %tmp2          ; <int> [#uses=1]
-       ret int %tmp
+        %tmp2 = getelementptr i32, i32* %v, i32 1023
+        %tmp = load i32, i32* %tmp2
+        ret i32 %tmp
 }
 
-int %f3(int* %v) {
+define i32 @f3(i32* %v) {
+; CHECK-LABEL: f3:
+; CHECK: mov
+; CHECK: ldr r0
 entry:
-       %tmp2 = getelementptr int* %v, int 1024         ; <int*> [#uses=1]
-       %tmp = load int* %tmp2          ; <int> [#uses=1]
-       ret int %tmp
+        %tmp2 = getelementptr i32, i32* %v, i32 1024
+        %tmp = load i32, i32* %tmp2
+        ret i32 %tmp
+}
+
+define i32 @f4(i32 %base) {
+; CHECK-LABEL: f4:
+; CHECK-NOT: mvn
+; CHECK: ldr r0
+entry:
+        %tmp1 = sub i32 %base, 128
+        %tmp2 = inttoptr i32 %tmp1 to i32*
+        %tmp3 = load i32, i32* %tmp2
+        ret i32 %tmp3
+}
+
+define i32 @f5(i32 %base, i32 %offset) {
+; CHECK-LABEL: f5:
+; CHECK: ldr r0
+entry:
+        %tmp1 = add i32 %base, %offset
+        %tmp2 = inttoptr i32 %tmp1 to i32*
+        %tmp3 = load i32, i32* %tmp2
+        ret i32 %tmp3
+}
+
+define i32 @f6(i32 %base, i32 %offset) {
+; CHECK-LABEL: f6:
+; CHECK: ldr r0{{.*}}lsl{{.*}}
+entry:
+        %tmp1 = shl i32 %offset, 2
+        %tmp2 = add i32 %base, %tmp1
+        %tmp3 = inttoptr i32 %tmp2 to i32*
+        %tmp4 = load i32, i32* %tmp3
+        ret i32 %tmp4
+}
+
+define i32 @f7(i32 %base, i32 %offset) {
+; CHECK-LABEL: f7:
+; CHECK: ldr r0{{.*}}lsr{{.*}}
+entry:
+        %tmp1 = lshr i32 %offset, 2
+        %tmp2 = add i32 %base, %tmp1
+        %tmp3 = inttoptr i32 %tmp2 to i32*
+        %tmp4 = load i32, i32* %tmp3
+        ret i32 %tmp4
 }