[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.

[oota-llvm.git] / test / CodeGen / ARM / ifcvt5.ll

diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
index afd7146fe6e3cfd4b05a9cb70d98ba46bcab935b..3aa2139cc03a9230c4956b8205c02983466e02db 100644 (file)
--- a/test/CodeGen/ARM/ifcvt5.ll
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -1,24 +1,31 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | count 1
+; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
+; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift     | FileCheck %s -check-prefix=SWIFT
+; rdar://8402126
 
 @x = external global i32*              ; <i32**> [#uses=1]
 
 define void @foo(i32 %a) {
 entry:
-       %tmp = load i32** @x            ; <i32*> [#uses=1]
+       %tmp = load i32*, i32** @x              ; <i32*> [#uses=1]
        store i32 %a, i32* %tmp
        ret void
 }
 
-define void @t1(i32 %a, i32 %b) {
+define i32 @t1(i32 %a, i32 %b) {
+; A8-LABEL: t1:
+; A8: poplt {r7, pc}
+
+; SWIFT-LABEL: t1:
+; SWIFT: pop {r7, pc}
+; SWIFT: pop {r7, pc}
 entry:
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
 cond_true:             ; preds = %entry
        tail call void @foo( i32 %b )
-       ret void
+       ret i32 0
 
 UnifiedReturnBlock:            ; preds = %entry
-       ret void
+       ret i32 1
 }