Fix ARM FastISel tests, as a first step to enabling ARM FastISel

[oota-llvm.git] / test / CodeGen / ARM / fast-isel-GEP-coalesce.ll

diff --git a/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll b/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll
index 60bc6a62f5d32438846805817e3b0fe702e4e895..28a84e3bf9e2af7df21faa1ed1c6f17db52e1855 100644 (file)
--- a/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll
+++ b/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll
@@ -26,8 +26,8 @@ entry:
 ; THUMB: t2
   %addr = alloca i32*, align 4
   store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), i32** %addr, align 4
-; ARM: movw r1, #1148
-; ARM: add r0, r0, r1
+; ARM: movw [[R:r[0-9]+]], #1148
+; ARM: add r0, r{{[0-9]+}}, [[R]]
 ; THUMB: addw r0, r0, #1148
   %0 = load i32** %addr, align 4
   ret i32* %0