[ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine it

[oota-llvm.git] / test / CodeGen / ARM / dagcombine-anyexttozeroext.ll

diff --git a/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll b/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll
index 18f57ea41cd83b74400b0c3c60bab192c125a161..8b7153503b1f87113eecb464f26a8a44287a2840 100644 (file)
--- a/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll
+++ b/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll
@@ -1,11 +1,11 @@
 ; RUN: llc -mtriple armv7 %s -o - | FileCheck %s
 
-; CHECK: f:
+; CHECK-LABEL: f:
 define float @f(<4 x i16>* nocapture %in) {
-  ; CHECK: vldr
+  ; CHECK: vld1
   ; CHECK: vmovl.u16
   ; CHECK-NOT: vand
-  %1 = load <4 x i16>* %in
+  %1 = load <4 x i16>, <4 x i16>* %in
   ; CHECK: vcvt.f32.u32
   %2 = uitofp <4 x i16> %1 to <4 x float>
   %3 = extractelement <4 x float> %2, i32 0
@@ -21,7 +21,7 @@ define float @f(<4 x i16>* nocapture %in) {
 
 define float @g(<4 x i16>* nocapture %in) {
   ; CHECK: vldr
-  %1 = load <4 x i16>* %in
+  %1 = load <4 x i16>, <4 x i16>* %in
   ; CHECK-NOT: uxth
   %2 = extractelement <4 x i16> %1, i32 0
   ; CHECK: vcvt.f32.u32