ARM: add test for crc32 instructions in CodeGen.

[oota-llvm.git] / test / CodeGen / ARM / constants.ll

diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll
index 0d69f53585bbef172e17cf19363de32469f70a42..3baa103e3d5df10842726970798c2246c6fb1469 100644 (file)
--- a/test/CodeGen/ARM/constants.ll
+++ b/test/CodeGen/ARM/constants.ll
@@ -1,34 +1,69 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #0" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #255" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #256" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep ".word.*257" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #-1073741761" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #1008" | wc -l | grep 1 &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "\.comm.*a,4,4" | wc -l | grep 1
+; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts -verify-machineinstrs | FileCheck %s
 
-%a = internal global int 0
+define i32 @f1() {
+; CHECK: f1
+; CHECK: mov r0, #0
+        ret i32 0
+}
+
+define i32 @f2() {
+; CHECK: f2
+; CHECK: mov r0, #255
+        ret i32 255
+}
 
-uint %f1() {
-  ret uint 0
+define i32 @f3() {
+; CHECK: f3
+; CHECK: mov r0, #256
+        ret i32 256
 }
 
-uint %f2() {
-  ret uint 255
+define i32 @f4() {
+; CHECK: f4
+; CHECK: orr{{.*}}#256
+        ret i32 257
 }
 
-uint %f3() {
-  ret uint 256
+define i32 @f5() {
+; CHECK: f5
+; CHECK: mov r0, #-1073741761
+        ret i32 -1073741761
 }
 
-uint %f4() {
-  ret uint 257
+define i32 @f6() {
+; CHECK: f6
+; CHECK: mov r0, #1008
+        ret i32 1008
 }
 
-uint %f5() {
-  ret uint 3221225535
+define void @f7(i32 %a) {
+; CHECK: f7
+; CHECK: cmp r0, #65536
+        %b = icmp ugt i32 %a, 65536
+        br i1 %b, label %r, label %r
+r:
+        ret void
 }
 
-uint %f6() {
-  ret uint 1008
+define i32 @f8() nounwind {
+; Check that constant propagation through (i32)-1 => (float)Nan => (i32)-1
+; gives expected result
+; CHECK: f8
+; CHECK: mvn r0, #0
+        %tmp0 = bitcast i32 -1 to float
+        %tmp1 = bitcast float %tmp0 to i32
+        ret i32 %tmp1
 }
+
+%t1 = type { <3 x float>, <3 x float> }
+
+@const1 = global %t1 { <3 x float> zeroinitializer,
+                       <3 x float> <float 1.000000e+00,
+                                    float 2.000000e+00,
+                                    float 3.000000e+00> }, align 16
+; CHECK: const1
+; CHECK: .zero 16
+; CHECK: float 1.0
+; CHECK: float 2.0
+; CHECK: float 3.0
+; CHECK: .zero 4