[ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine it

[oota-llvm.git] / test / CodeGen / ARM / 2011-11-29-128bitArithmetics.ll

diff --git a/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll b/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
index 0d0d03b23e86868542a6b7e4a3839ec0ba4accdd..404aca13cdba6ac3a17c48d0a5749071e561f2b7 100644 (file)
--- a/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
+++ b/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -float-abi=soft -mcpu=cortex-a9 %s -o - | FileCheck %s
 
 @A = global <4 x float> <float 0., float 1., float 2., float 3.>
 
 define void @test_sqrt(<4 x float>* %X) nounwind {
 
-; CHECK: test_sqrt:
+; CHECK-LABEL: test_sqrt:
 
 ; CHECK:      movw    r1, :lower16:{{.*}}
 ; CHECK:      movt    r1, :upper16:{{.*}}
@@ -16,7 +16,7 @@ define void @test_sqrt(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64  {{.*}}
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -27,7 +27,7 @@ declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind readonly
 
 define void @test_cos(<4 x float>* %X) nounwind {
 
-; CHECK: test_cos:
+; CHECK-LABEL: test_cos:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -48,7 +48,7 @@ define void @test_cos(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.cos.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -58,7 +58,7 @@ declare <4 x float> @llvm.cos.v4f32(<4 x float>) nounwind readonly
 
 define void @test_exp(<4 x float>* %X) nounwind {
 
-; CHECK: test_exp:
+; CHECK-LABEL: test_exp:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -79,7 +79,7 @@ define void @test_exp(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.exp.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -89,7 +89,7 @@ declare <4 x float> @llvm.exp.v4f32(<4 x float>) nounwind readonly
 
 define void @test_exp2(<4 x float>* %X) nounwind {
 
-; CHECK: test_exp2:
+; CHECK-LABEL: test_exp2:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -110,7 +110,7 @@ define void @test_exp2(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.exp2.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -120,7 +120,7 @@ declare <4 x float> @llvm.exp2.v4f32(<4 x float>) nounwind readonly
 
 define void @test_log10(<4 x float>* %X) nounwind {
 
-; CHECK: test_log10:
+; CHECK-LABEL: test_log10:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -141,7 +141,7 @@ define void @test_log10(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.log10.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -151,7 +151,7 @@ declare <4 x float> @llvm.log10.v4f32(<4 x float>) nounwind readonly
 
 define void @test_log(<4 x float>* %X) nounwind {
 
-; CHECK: test_log:
+; CHECK-LABEL: test_log:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -172,7 +172,7 @@ define void @test_log(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.log.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -182,7 +182,7 @@ declare <4 x float> @llvm.log.v4f32(<4 x float>) nounwind readonly
 
 define void @test_log2(<4 x float>* %X) nounwind {
 
-; CHECK: test_log2:
+; CHECK-LABEL: test_log2:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -203,7 +203,7 @@ define void @test_log2(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.log2.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -214,7 +214,7 @@ declare <4 x float> @llvm.log2.v4f32(<4 x float>) nounwind readonly
 
 define void @test_pow(<4 x float>* %X) nounwind {
 
-; CHECK: test_pow:
+; CHECK-LABEL: test_pow:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -236,7 +236,7 @@ define void @test_pow(<4 x float>* %X) nounwind {
 
 L.entry:
 
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.pow.v4f32(<4 x float> %0, <4 x float> <float 2., float 2., float 2., float 2.>)
 
   store <4 x float> %1, <4 x float>* %X, align 16
@@ -248,7 +248,7 @@ declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>) nounwind readonly
 
 define void @test_powi(<4 x float>* %X) nounwind {
 
-; CHECK: test_powi:
+; CHECK-LABEL: test_powi:
 
 ; CHECK:       movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:       movt  [[reg0]], :upper16:{{.*}}
@@ -259,7 +259,7 @@ define void @test_powi(<4 x float>* %X) nounwind {
 
 L.entry:
 
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.powi.v4f32(<4 x float> %0, i32 2)
 
   store <4 x float> %1, <4 x float>* %X, align 16
@@ -271,7 +271,7 @@ declare <4 x float> @llvm.powi.v4f32(<4 x float>, i32) nounwind readonly
 
 define void @test_sin(<4 x float>* %X) nounwind {
 
-; CHECK: test_sin:
+; CHECK-LABEL: test_sin:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -292,7 +292,7 @@ define void @test_sin(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.sin.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void
@@ -302,7 +302,7 @@ declare <4 x float> @llvm.sin.v4f32(<4 x float>) nounwind readonly
 
 define void @test_floor(<4 x float>* %X) nounwind {
 
-; CHECK: test_floor:
+; CHECK-LABEL: test_floor:
 
 ; CHECK:      movw  [[reg0:r[0-9]+]], :lower16:{{.*}}
 ; CHECK:      movt  [[reg0]], :upper16:{{.*}}
@@ -323,7 +323,7 @@ define void @test_floor(<4 x float>* %X) nounwind {
 ; CHECK:      vst1.64
 
 L.entry:
-  %0 = load <4 x float>* @A, align 16
+  %0 = load <4 x float>, <4 x float>* @A, align 16
   %1 = call <4 x float> @llvm.floor.v4f32(<4 x float> %0)
   store <4 x float> %1, <4 x float>* %X, align 16
   ret void