[X86][SSE] Added tests for i8/i16 vector shifts

[oota-llvm.git] / test / CodeGen / ARM / 2009-06-30-RegScavengerAssert3.ll

diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
index fb6ca109fc5add633a430da854f2f5c9d82ef045..cf7325ddf89590467cfcc655eb16a7ca55219294 100644 (file)
--- a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
@@ -28,7 +28,7 @@ bb11:         ; preds = %bb9
        br i1 undef, label %bb15, label %bb12
 
 bb12:          ; preds = %bb11
-       %0 = load i32** @JJ, align 4            ; <i32*> [#uses=1]
+       %0 = load i32*, i32** @JJ, align 4              ; <i32*> [#uses=1]
        br label %bb228.i
 
 bb74.i:                ; preds = %bb228.i
@@ -85,9 +85,9 @@ bb168.i:              ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
        %fi.5.i = phi i32 [ undef, %bb167.i ], [ %ci.910.i, %bb158.i ], [ undef, %bb160.i ], [ %ci.910.i, %bb161.i ], [ undef, %bb163.i ]               ; <i32> [#uses=1]
        %fj.4.i = phi i32 [ undef, %bb167.i ], [ undef, %bb158.i ], [ %fj.515.i, %bb160.i ], [ undef, %bb161.i ], [ %fj.515.i, %bb163.i ]               ; <i32> [#uses=2]
        %scevgep88.i = getelementptr i32, i32* null, i32 %i.121.i               ; <i32*> [#uses=3]
-       %4 = load i32* %scevgep88.i, align 4            ; <i32> [#uses=2]
+       %4 = load i32, i32* %scevgep88.i, align 4               ; <i32> [#uses=2]
        %scevgep89.i = getelementptr i32, i32* %0, i32 %i.121.i         ; <i32*> [#uses=3]
-       %5 = load i32* %scevgep89.i, align 4            ; <i32> [#uses=1]
+       %5 = load i32, i32* %scevgep89.i, align 4               ; <i32> [#uses=1]
        %ci.10.i = select i1 undef, i32 %pi.316.i, i32 %i.121.i         ; <i32> [#uses=0]
        %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef             ; <i32> [#uses=0]
        %6 = icmp slt i32 undef, 0              ; <i1> [#uses=3]
@@ -95,8 +95,8 @@ bb168.i:              ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
        %cj.11.i100 = select i1 %6, i32 %fj.4.i, i32 %5         ; <i32> [#uses=1]
        %c.14.i = select i1 %6, i32 0, i32 undef                ; <i32> [#uses=2]
        store i32 %c.14.i, i32* undef, align 4
-       %7 = load i32* %scevgep88.i, align 4            ; <i32> [#uses=1]
-       %8 = load i32* %scevgep89.i, align 4            ; <i32> [#uses=1]
+       %7 = load i32, i32* %scevgep88.i, align 4               ; <i32> [#uses=1]
+       %8 = load i32, i32* %scevgep89.i, align 4               ; <i32> [#uses=1]
        store i32 %ci.12.i, i32* %scevgep88.i, align 4
        store i32 %cj.11.i100, i32* %scevgep89.i, align 4
        store i32 %4, i32* undef, align 4