[ARM] Add a first test for the Thumb-2 code size optimization pass.

[oota-llvm.git] / test / CodeGen / ARM / 2007-05-07-tailmerge-1.ll

diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
index 15efd60c14aa22c7acfa802efe83882265c56407..55cea3aad13f63e798c6a22d346b5dce7c6e7e3b 100644 (file)
--- a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
+++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
@@ -1,6 +1,7 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1
-; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
 ; Check that calls to baz and quux are tail-merged.
+; PR1628
 
 ; ModuleID = 'tail.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
@@ -11,7 +12,6 @@ entry:
        %i_addr = alloca i32            ; <i32*> [#uses=2]
        %q_addr = alloca i32            ; <i32*> [#uses=2]
        %retval = alloca i32, align 4           ; <i32*> [#uses=1]
-       "alloca point" = bitcast i32 0 to i32           ; <i32> [#uses=0]
        store i32 %i, i32* %i_addr
        store i32 %q, i32* %q_addr
        %tmp = load i32* %i_addr                ; <i32> [#uses=1]