AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA

[oota-llvm.git] / test / CodeGen / AMDGPU / global-constant.ll

diff --git a/test/CodeGen/AMDGPU/global-constant.ll b/test/CodeGen/AMDGPU/global-constant.ll
index b52a0a103130c3444a09b88ccabca4d4f17a8507..bc5f031cd4a2931c29eb4e5eebd1b30890cae29a 100644 (file)
--- a/test/CodeGen/AMDGPU/global-constant.ll
+++ b/test/CodeGen/AMDGPU/global-constant.ll
@@ -1,4 +1,5 @@
-; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s
+; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s
 
 @readonly = private unnamed_addr addrspace(2) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
 @readonly2 = private unnamed_addr addrspace(2) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
@@ -10,7 +11,8 @@
 ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
 ; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], readonly
 ; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0
-; GCN: .text
+; NOHSA: .text
+; HSA: .hsatext
 ; GCN: readonly:
 ; GCN: readonly2:
 define void @main(i32 %index, float addrspace(1)* %out) {