[AArch64]Merge narrow zero stores to a wider store

[oota-llvm.git] / test / CodeGen / AArch64 / code-model-large-abs.ll

diff --git a/test/CodeGen/AArch64/code-model-large-abs.ll b/test/CodeGen/AArch64/code-model-large-abs.ll
index 682ee3f2a294cc2dcdb7d3d31f01779b65c0d983..1680815d93ea4fe4a23d6614f6ab98750da96d27 100644 (file)
--- a/test/CodeGen/AArch64/code-model-large-abs.ll
+++ b/test/CodeGen/AArch64/code-model-large-abs.ll
@@ -1,5 +1,4 @@
-; RUN: llc -mtriple=aarch64-none-linux-gnu -code-model=large < %s | FileCheck %s
-; RUN: llc -mtriple=arm64 -code-model=large -o - %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu -code-model=large -o - %s | FileCheck %s
 
 @var8 = global i8 0
 @var16 = global i16 0
@@ -19,7 +18,7 @@ define i8* @global_addr() {
 
 define i8 @global_i8() {
 ; CHECK-LABEL: global_i8:
-  %val = load i8* @var8
+  %val = load i8, i8* @var8
   ret i8 %val
 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8
 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8
@@ -30,7 +29,7 @@ define i8 @global_i8() {
 
 define i16 @global_i16() {
 ; CHECK-LABEL: global_i16:
-  %val = load i16* @var16
+  %val = load i16, i16* @var16
   ret i16 %val
 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16
 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
@@ -41,7 +40,7 @@ define i16 @global_i16() {
 
 define i32 @global_i32() {
 ; CHECK-LABEL: global_i32:
-  %val = load i32* @var32
+  %val = load i32, i32* @var32
   ret i32 %val
 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32
 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32
@@ -52,7 +51,7 @@ define i32 @global_i32() {
 
 define i64 @global_i64() {
 ; CHECK-LABEL: global_i64:
-  %val = load i64* @var64
+  %val = load i64, i64* @var64
   ret i64 %val
 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64
 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64