[AArch64]Merge narrow zero stores to a wider store

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-abi-varargs.ll

diff --git a/test/CodeGen/AArch64/arm64-abi-varargs.ll b/test/CodeGen/AArch64/arm64-abi-varargs.ll
index 92db392cd04115d793dcfbed4e22252d4ec809fe..03414b56144c09d3964e12ec35fe9f3e97b12777 100644 (file)
--- a/test/CodeGen/AArch64/arm64-abi-varargs.ll
+++ b/test/CodeGen/AArch64/arm64-abi-varargs.ll
@@ -82,19 +82,19 @@ define i32 @main() nounwind ssp {
   store i32 10, i32* %a10, align 4
   store i32 11, i32* %a11, align 4
   store i32 12, i32* %a12, align 4
-  %1 = load i32* %a1, align 4
-  %2 = load i32* %a2, align 4
-  %3 = load i32* %a3, align 4
-  %4 = load i32* %a4, align 4
-  %5 = load i32* %a5, align 4
-  %6 = load i32* %a6, align 4
-  %7 = load i32* %a7, align 4
-  %8 = load i32* %a8, align 4
-  %9 = load i32* %a9, align 4
-  %10 = load i32* %a10, align 4
-  %11 = load i32* %a11, align 4
-  %12 = load i32* %a12, align 4
-  call void (i32, i32, i32, i32, i32, i32, i32, i32, i32, ...)* @fn9(i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12)
+  %1 = load i32, i32* %a1, align 4
+  %2 = load i32, i32* %a2, align 4
+  %3 = load i32, i32* %a3, align 4
+  %4 = load i32, i32* %a4, align 4
+  %5 = load i32, i32* %a5, align 4
+  %6 = load i32, i32* %a6, align 4
+  %7 = load i32, i32* %a7, align 4
+  %8 = load i32, i32* %a8, align 4
+  %9 = load i32, i32* %a9, align 4
+  %10 = load i32, i32* %a10, align 4
+  %11 = load i32, i32* %a11, align 4
+  %12 = load i32, i32* %a12, align 4
+  call void (i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @fn9(i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12)
   ret i32 0
 }
 
@@ -131,9 +131,9 @@ entry:
   %y.addr = alloca <4 x i32>, align 16
   store i32 %x, i32* %x.addr, align 4
   store <4 x i32> %y, <4 x i32>* %y.addr, align 16
-  %0 = load i32* %x.addr, align 4
-  %1 = load <4 x i32>* %y.addr, align 16
-  call void (i8*, ...)* @foo(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %0, <4 x i32> %1)
+  %0 = load i32, i32* %x.addr, align 4
+  %1 = load <4 x i32>, <4 x i32>* %y.addr, align 16
+  call void (i8*, ...) @foo(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %0, <4 x i32> %1)
   ret void
 }
 
@@ -158,12 +158,12 @@ entry:
   call void @llvm.va_start(i8* %args1)
   %0 = va_arg i8** %args, i32
   store i32 %0, i32* %vc, align 4
-  %ap.cur = load i8** %args
-  %1 = getelementptr i8* %ap.cur, i32 15
+  %ap.cur = load i8*, i8** %args
+  %1 = getelementptr i8, i8* %ap.cur, i32 15
   %2 = ptrtoint i8* %1 to i64
   %3 = and i64 %2, -16
   %ap.align = inttoptr i64 %3 to i8*
-  %ap.next = getelementptr i8* %ap.align, i32 16
+  %ap.next = getelementptr i8, i8* %ap.align, i32 16
   store i8* %ap.next, i8** %args
   %4 = bitcast i8* %ap.align to %struct.s41*
   %5 = bitcast %struct.s41* %vs to i8*
@@ -183,9 +183,9 @@ entry:
   store i32 %x, i32* %x.addr, align 4
   %0 = bitcast %struct.s41* %s41 to i128*
   store i128 %s41.coerce, i128* %0, align 1
-  %1 = load i32* %x.addr, align 4
+  %1 = load i32, i32* %x.addr, align 4
   %2 = bitcast %struct.s41* %s41 to i128*
-  %3 = load i128* %2, align 1
-  call void (i8*, ...)* @foo2(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %1, i128 %3)
+  %3 = load i128, i128* %2, align 1
+  call void (i8*, ...) @foo2(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %1, i128 %3)
   ret void
 }