Merging r259381:

[oota-llvm.git] / test / Bitcode / vectorInstructions.3.2.ll

diff --git a/test/Bitcode/vectorInstructions.3.2.ll b/test/Bitcode/vectorInstructions.3.2.ll
index b24ef75ef0810178da0a25516868f5558264c976..94c193a1c4414d0e940ace08cd815e448d37b138 100644 (file)
--- a/test/Bitcode/vectorInstructions.3.2.ll
+++ b/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,34 +1,33 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s\r
-\r
-; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.\r
-; The test checks that LLVM does not misread vector operations of\r
-; older bitcode files.\r
-\r
-define void @extractelement(<2 x i8> %x1){\r
-entry:\r
-; CHECK: %res1 = extractelement <2 x i8> %x1, i32 0\r
-  %res1 = extractelement <2 x i8> %x1, i32 0\r
-  \r
-  ret void\r
-}\r
-\r
-define void @insertelement(<2 x i8> %x1){\r
-entry:\r
-; CHECK: %res1 = insertelement <2 x i8> %x1, i8 0, i32 0\r
-  %res1 = insertelement <2 x i8> %x1, i8 0, i32 0\r
-  \r
-  ret void\r
-}\r
-\r
-define void @shufflevector(<2 x i8> %x1){\r
-entry:\r
-; CHECK: %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>\r
-  %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>\r
-\r
-; CHECK-NEXT: %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>\r
-  %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>\r
-  \r
-  ret void\r
-}\r
-\r
-\r
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread vector operations of
+; older bitcode files.
+
+define void @extractelement(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = extractelement <2 x i8> %x1, i32 0
+  %res1 = extractelement <2 x i8> %x1, i32 0
+
+  ret void
+}
+
+define void @insertelement(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
+  %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
+
+  ret void
+}
+
+define void @shufflevector(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
+  %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
+
+; CHECK-NEXT: %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
+  %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
+
+  ret void
+}