[x86] lower calls to fmin and llvm.minnum.* using minss/minsd/minps/minpd (PR24475)

[oota-llvm.git] / test / Bitcode / bitwiseInstructions.3.2.ll

diff --git a/test/Bitcode/bitwiseInstructions.3.2.ll b/test/Bitcode/bitwiseInstructions.3.2.ll
index 6225a08f20643472fbffebb967e7570f8bcb0aad..aaaf4f543a8ebc385fbd73401983a5020e81b2c8 100644 (file)
--- a/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,68 +1,69 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s\r
-\r
-; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.\r
-; The test checks that LLVM does not misread bitwise instructions from\r
-; older bitcode files.\r
-\r
-define void @shl(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = shl i8 %x1, %x1\r
-  %res1 = shl i8 %x1, %x1\r
-  \r
-; CHECK: %res2 = shl nuw i8 %x1, %x1\r
-  %res2 = shl nuw i8 %x1, %x1\r
-  \r
-; CHECK: %res3 = shl nsw i8 %x1, %x1\r
-  %res3 = shl nsw i8 %x1, %x1\r
-\r
-; CHECK: %res4 = shl nuw nsw i8 %x1, %x1\r
-  %res4 = shl nuw nsw i8 %x1, %x1\r
-  \r
-  ret void\r
-}\r
-\r
-define void @lshr(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = lshr i8 %x1, %x1\r
-  %res1 = lshr i8 %x1, %x1\r
-  \r
-; CHECK: %res2 = lshr exact i8 %x1, %x1\r
-  %res2 = lshr exact i8 %x1, %x1\r
-  \r
-  ret void\r
-}\r
-\r
-define void @ashr(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = ashr i8 %x1, %x1\r
-  %res1 = ashr i8 %x1, %x1\r
-\r
-; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1\r
-  %res2 = ashr exact i8 %x1, %x1\r
-\r
-  ret void\r
-}\r
-\r
-define void @and(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = and i8 %x1, %x1\r
-  %res1 = and i8 %x1, %x1\r
-  \r
-  ret void\r
-}\r
-\r
-define void @or(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = or i8 %x1, %x1\r
-  %res1 = or i8 %x1, %x1\r
-  \r
-  ret void\r
-}\r
-\r
-define void @xor(i8 %x1){\r
-entry:\r
-; CHECK: %res1 = xor i8 %x1, %x1\r
-  %res1 = xor i8 %x1, %x1\r
-  \r
-  ret void\r
-}
\ No newline at end of file
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread bitwise instructions from
+; older bitcode files.
+
+define void @shl(i8 %x1){
+entry:
+; CHECK: %res1 = shl i8 %x1, %x1
+  %res1 = shl i8 %x1, %x1
+
+; CHECK: %res2 = shl nuw i8 %x1, %x1
+  %res2 = shl nuw i8 %x1, %x1
+
+; CHECK: %res3 = shl nsw i8 %x1, %x1
+  %res3 = shl nsw i8 %x1, %x1
+
+; CHECK: %res4 = shl nuw nsw i8 %x1, %x1
+  %res4 = shl nuw nsw i8 %x1, %x1
+
+  ret void
+}
+
+define void @lshr(i8 %x1){
+entry:
+; CHECK: %res1 = lshr i8 %x1, %x1
+  %res1 = lshr i8 %x1, %x1
+
+; CHECK: %res2 = lshr exact i8 %x1, %x1
+  %res2 = lshr exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @ashr(i8 %x1){
+entry:
+; CHECK: %res1 = ashr i8 %x1, %x1
+  %res1 = ashr i8 %x1, %x1
+
+; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
+  %res2 = ashr exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @and(i8 %x1){
+entry:
+; CHECK: %res1 = and i8 %x1, %x1
+  %res1 = and i8 %x1, %x1
+
+  ret void
+}
+
+define void @or(i8 %x1){
+entry:
+; CHECK: %res1 = or i8 %x1, %x1
+  %res1 = or i8 %x1, %x1
+
+  ret void
+}
+
+define void @xor(i8 %x1){
+entry:
+; CHECK: %res1 = xor i8 %x1, %x1
+  %res1 = xor i8 %x1, %x1
+
+  ret void
+}