Ensure bitcode encoding of instructions and their operands stays stable.

[oota-llvm.git] / test / Bitcode / aggregateInstructions.3.2.ll

diff --git a/test/Bitcode/aggregateInstructions.3.2.ll b/test/Bitcode/aggregateInstructions.3.2.ll
new file mode 100644 (file)
index 0000000..9352390
--- /dev/null
+++ b/test/Bitcode/aggregateInstructions.3.2.ll
@@ -0,0 +1,33 @@
+; RUN:  llvm-dis < %s.bc| FileCheck %s\r
+\r
+; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.\r
+; The test checks that LLVM does not misread instructions with aggregate operands\r
+; in older bitcode files.\r
+\r
+define void @extractvalue([4 x i8] %x1, [4 x [4 x i8]] %x2, {{i32, float}} %x3){\r
+entry:\r
+; CHECK: %res1 = extractvalue [4 x i8] %x1, 0\r
+  %res1 = extractvalue [4 x i8] %x1, 0\r
+  \r
+; CHECK-NEXT: %res2 = extractvalue [4 x [4 x i8]] %x2, 1\r
+  %res2 = extractvalue [4 x [4 x i8 ]] %x2, 1\r
+\r
+; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1\r
+  %res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1\r
+  \r
+; CHECK-NEXT: %res4 = extractvalue { { i32, float } } %x3, 0, 1\r
+  %res4 = extractvalue {{i32, float}} %x3, 0, 1\r
+\r
+  ret void\r
+}\r
+\r
+define void @insertvalue([4 x [4 x i8 ]] %x1){\r
+entry:\r
+; CHECK: %res1 = insertvalue [4 x [4 x i8]] %x1, i8 0, 0, 0\r
+  %res1 = insertvalue [4 x [4 x i8 ]] %x1, i8 0, 0, 0\r
+  \r
+; CHECK-NEXT: %res2 = insertvalue [4 x [4 x i8]] undef, i8 0, 0, 0\r
+  %res2 = insertvalue [4 x [4 x i8 ]] undef, i8 0, 0, 0\r
+\r
+  ret void\r
+}
\ No newline at end of file