//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// The LowerSwitch transformation rewrites switch statements with a sequence of
-// branches, which allows targets to get away with not implementing the switch
-// statement until it is convenient.
+// The LowerSwitch transformation rewrites switch instructions with a sequence
+// of branches, which allows targets to get away with not implementing the
+// switch instruction until it is convenient.
//
//===----------------------------------------------------------------------===//
#include "llvm/Function.h"
#include "llvm/Instructions.h"
#include "llvm/Pass.h"
+#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
/// modifies the CFG!
class VISIBILITY_HIDDEN LowerSwitch : public FunctionPass {
public:
+ static char ID; // Pass identification, replacement for typeid
+ LowerSwitch() : FunctionPass(&ID) {}
+
virtual bool runOnFunction(Function &F);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
// This is a cluster of orthogonal Transforms
AU.addPreserved<UnifyFunctionExitNodes>();
AU.addPreservedID(PromoteMemoryToRegisterID);
- AU.addPreservedID(LowerSelectID);
AU.addPreservedID(LowerInvokePassID);
AU.addPreservedID(LowerAllocationsID);
}
return CI1->getValue().slt(CI2->getValue());
}
};
-
- RegisterPass<LowerSwitch>
- X("lowerswitch", "Lower SwitchInst's to branches");
}
+char LowerSwitch::ID = 0;
+static RegisterPass<LowerSwitch>
+X("lowerswitch", "Lower SwitchInst's to branches");
+
// Publically exposed interface to pass...
-const PassInfo *llvm::LowerSwitchID = X.getPassInfo();
+const PassInfo *const llvm::LowerSwitchID = &X;
// createLowerSwitchPass - Interface to this file...
FunctionPass *llvm::createLowerSwitchPass() {
return new LowerSwitch();
DOUT << "RHS: " << RHS << "\n";
CaseRange& Pivot = *(Begin + Mid);
- DEBUG( DOUT << "Pivot ==> "
- << cast<ConstantInt>(Pivot.Low)->getValue().toStringSigned(10)
- << " -"
- << cast<ConstantInt>(Pivot.High)->getValue().toStringSigned(10)
- << "\n");
+ DEBUG(errs() << "Pivot ==> "
+ << cast<ConstantInt>(Pivot.Low)->getValue() << " -"
+ << cast<ConstantInt>(Pivot.High)->getValue() << "\n";
+ errs().flush());
BasicBlock* LBranch = switchConvert(LHS.begin(), LHS.end(), Val,
OrigBlock, Default);
// Create a new node that checks if the value is < pivot. Go to the
// left branch if it is and right branch if not.
Function* F = OrigBlock->getParent();
- BasicBlock* NewNode = new BasicBlock("NodeBlock");
+ BasicBlock* NewNode = BasicBlock::Create("NodeBlock");
Function::iterator FI = OrigBlock;
F->getBasicBlockList().insert(++FI, NewNode);
ICmpInst* Comp = new ICmpInst(ICmpInst::ICMP_SLT, Val, Pivot.Low, "Pivot");
NewNode->getInstList().push_back(Comp);
- new BranchInst(LBranch, RBranch, Comp, NewNode);
+ BranchInst::Create(LBranch, RBranch, Comp, NewNode);
return NewNode;
}
BasicBlock* Default)
{
Function* F = OrigBlock->getParent();
- BasicBlock* NewLeaf = new BasicBlock("LeafBlock");
+ BasicBlock* NewLeaf = BasicBlock::Create("LeafBlock");
Function::iterator FI = OrigBlock;
F->getBasicBlockList().insert(++FI, NewLeaf);
} else {
// Emit V-Lo <=u Hi-Lo
Constant* NegLo = ConstantExpr::getNeg(Leaf.Low);
- Instruction* Add = BinaryOperator::createAdd(Val, NegLo,
+ Instruction* Add = BinaryOperator::CreateAdd(Val, NegLo,
Val->getName()+".off",
NewLeaf);
Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High);
// Make the conditional branch...
BasicBlock* Succ = Leaf.BB;
- new BranchInst(Succ, Default, Comp, NewLeaf);
+ BranchInst::Create(Succ, Default, Comp, NewLeaf);
// If there were any PHI nodes in this successor, rewrite one entry
// from OrigBlock to come from NewLeaf.
Cases.push_back(CaseRange(SI->getSuccessorValue(i),
SI->getSuccessorValue(i),
SI->getSuccessor(i)));
- sort(Cases.begin(), Cases.end(), CaseCmp());
+ std::sort(Cases.begin(), Cases.end(), CaseCmp());
// Merge case into clusters
if (Cases.size()>=2)
- for (CaseItr I=Cases.begin(), J=++(Cases.begin()), E=Cases.end(); J!=E; ) {
+ for (CaseItr I=Cases.begin(), J=next(Cases.begin()); J!=Cases.end(); ) {
int64_t nextValue = cast<ConstantInt>(J->Low)->getSExtValue();
int64_t currentValue = cast<ConstantInt>(I->High)->getSExtValue();
BasicBlock* nextBB = J->BB;
// If there is only the default destination, don't bother with the code below.
if (SI->getNumOperands() == 2) {
- new BranchInst(SI->getDefaultDest(), CurBlock);
+ BranchInst::Create(SI->getDefaultDest(), CurBlock);
CurBlock->getInstList().erase(SI);
return;
}
// Create a new, empty default block so that the new hierarchy of
// if-then statements go to this and the PHI nodes are happy.
- BasicBlock* NewDefault = new BasicBlock("NewDefault");
+ BasicBlock* NewDefault = BasicBlock::Create("NewDefault");
F->getBasicBlockList().insert(Default, NewDefault);
- new BranchInst(Default, NewDefault);
+ BranchInst::Create(Default, NewDefault);
// If there is an entry in any PHI nodes for the default edge, make sure
// to update them as well.
OrigBlock, NewDefault);
// Branch to our shiny new if-then stuff...
- new BranchInst(SwitchBlock, OrigBlock);
+ BranchInst::Create(SwitchBlock, OrigBlock);
// We are now done with the switch instruction, delete it.
CurBlock->getInstList().erase(SI);
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