-//===- XCoreRegisterInfo.td - XCore Register defs ----------*- tablegen -*-===//
+//===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
//
def GRRegs : RegisterClass<"XCore", [i32], 32,
// Return values and arguments
- [R0, R1, R2, R3,
- // Not preserved across procedure calls
- R11,
+ (add R0, R1, R2, R3,
// Callee save
- R4, R5, R6, R7, R8, R9, R10]> {
- let MethodProtos = [{
- iterator allocation_order_begin(const MachineFunction &MF) const;
- iterator allocation_order_end(const MachineFunction &MF) const;
- }];
- let MethodBodies = [{
- GRRegsClass::iterator
- GRRegsClass::allocation_order_begin(const MachineFunction &MF) const {
- return begin();
- }
- GRRegsClass::iterator
- GRRegsClass::allocation_order_end(const MachineFunction &MF) const {
- const TargetMachine &TM = MF.getTarget();
- const TargetRegisterInfo *RI = TM.getRegisterInfo();
- if (RI->hasFP(MF))
- return end()-1; // don't allocate R10
- else
- return end();
- }
- }];
-}
+ R4, R5, R6, R7, R8, R9, R10,
+ // Not preserved across procedure calls
+ R11)>;
+// Reserved
def RRegs : RegisterClass<"XCore", [i32], 32,
- // Reserved
- [CP, DP, SP, LR]> {
- let MethodProtos = [{
- iterator allocation_order_begin(const MachineFunction &MF) const;
- iterator allocation_order_end(const MachineFunction &MF) const;
- }];
- let MethodBodies = [{
- RRegsClass::iterator
- RRegsClass::allocation_order_begin(const MachineFunction &MF) const {
- return begin();
- }
- RRegsClass::iterator
- RRegsClass::allocation_order_end(const MachineFunction &MF) const {
- // No allocatable registers
- return begin();
- }
- }];
+ (add R0, R1, R2, R3,
+ R4, R5, R6, R7, R8, R9, R10,
+ R11, CP, DP, SP, LR)> {
+ let isAllocatable = 0;
}