Add instruction encodings / disassembly support for 0r instructions.

[oota-llvm.git] / lib / Target / XCore / XCoreInstrFormats.td

diff --git a/lib/Target/XCore/XCoreInstrFormats.td b/lib/Target/XCore/XCoreInstrFormats.td
index f7fa673db818d3ddda1f7d16cd7ad4e16e4ce6d0..c120240d6e2b3b59f513c742a4a4e6f4a6fcc436 100644 (file)
--- a/lib/Target/XCore/XCoreInstrFormats.td
+++ b/lib/Target/XCore/XCoreInstrFormats.td
@@ -95,8 +95,11 @@ class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
   let Inst{3-0} = a;
 }
 
-class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
+class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
     : InstXCore<2, outs, ins, asmstr, pattern> {
+  let Inst{15-11} = opc{9-5};
+  let Inst{10-5} = 0b111111;
+  let Inst{4-0} = opc{4-0};
 }
 
 class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>