Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.

[oota-llvm.git] / lib / Target / X86 / X86TargetMachine.h

diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index 565cdcfd62aa953acf1182a3b0702f119150f2ac..85abe0c377cc888852007895c87aec31d002146f 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -25,6 +25,8 @@
 #include "X86ISelLowering.h"
 
 namespace llvm {
+  
+class formatted_raw_ostream;
 
 class X86TargetMachine : public LLVMTargetMachine {
   X86Subtarget      Subtarget;
@@ -34,48 +36,59 @@ class X86TargetMachine : public LLVMTargetMachine {
   X86JITInfo        JITInfo;
   X86TargetLowering TLInfo;
   X86ELFWriterInfo  ELFWriterInfo;
+  Reloc::Model      DefRelocModel; // Reloc model before it's overridden.
 
 protected:
   virtual const TargetAsmInfo *createTargetAsmInfo() const;
-  
+
 public:
-  X86TargetMachine(const Module &M, const std::string &FS, bool is64Bit);
+  X86TargetMachine(const Target &T, const Module &M, const std::string &FS, 
+                   bool is64Bit);
 
   virtual const X86InstrInfo     *getInstrInfo() const { return &InstrInfo; }
   virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
-  virtual       TargetJITInfo    *getJITInfo()         { return &JITInfo; }
-  virtual const TargetSubtarget  *getSubtargetImpl() const{ return &Subtarget; }
+  virtual       X86JITInfo       *getJITInfo()         { return &JITInfo; }
+  virtual const X86Subtarget     *getSubtargetImpl() const{ return &Subtarget; }
   virtual       X86TargetLowering *getTargetLowering() const { 
     return const_cast<X86TargetLowering*>(&TLInfo); 
   }
-  virtual const MRegisterInfo    *getRegisterInfo() const {
+  virtual const X86RegisterInfo  *getRegisterInfo() const {
     return &InstrInfo.getRegisterInfo();
   }
   virtual const TargetData       *getTargetData() const { return &DataLayout; }
   virtual const X86ELFWriterInfo *getELFWriterInfo() const {
-    return &ELFWriterInfo;
+    return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
   }
 
-  static unsigned getModuleMatchQuality(const Module &M);
-  static unsigned getJITMatchQuality();
-  
-  
   // Set up the pass pipeline.
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);  
-  virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
-                                  std::ostream &Out);
-  virtual bool addObjectWriter(FunctionPassManager &PM, bool Fast,
-                               std::ostream &Out);
-  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM,
+                                  CodeGenOpt::Level OptLevel, 
+                                  bool Verbose, formatted_raw_ostream &Out);
+  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
                               MachineCodeEmitter &MCE);
+  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
+                              JITCodeEmitter &JCE);
+  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
+                              ObjectCodeEmitter &OCE);
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+                                    CodeGenOpt::Level OptLevel,
+                                    MachineCodeEmitter &MCE);
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+                                    CodeGenOpt::Level OptLevel,
+                                    JITCodeEmitter &JCE);
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+                                    CodeGenOpt::Level OptLevel,
+                                    ObjectCodeEmitter &OCE);
 };
 
 /// X86_32TargetMachine - X86 32-bit target machine.
 ///
 class X86_32TargetMachine : public X86TargetMachine {
 public:
-  X86_32TargetMachine(const Module &M, const std::string &FS);
+  X86_32TargetMachine(const Target &T, const Module &M, const std::string &FS);
   
   static unsigned getJITMatchQuality();
   static unsigned getModuleMatchQuality(const Module &M);
@@ -85,7 +98,7 @@ public:
 ///
 class X86_64TargetMachine : public X86TargetMachine {
 public:
-  X86_64TargetMachine(const Module &M, const std::string &FS);
+  X86_64TargetMachine(const Target &T, const Module &M, const std::string &FS);
   
   static unsigned getJITMatchQuality();
   static unsigned getModuleMatchQuality(const Module &M);