//
//===----------------------------------------------------------------------===//
-#ifndef X86TARGETMACHINE_H
-#define X86TARGETMACHINE_H
+#ifndef LLVM_LIB_TARGET_X86_X86TARGETMACHINE_H
+#define LLVM_LIB_TARGET_X86_X86TARGETMACHINE_H
#include "X86InstrInfo.h"
#include "X86Subtarget.h"
#include "llvm/IR/DataLayout.h"
class StringRef;
class X86TargetMachine final : public LLVMTargetMachine {
- virtual void anchor();
- X86Subtarget Subtarget;
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;
+ X86Subtarget Subtarget;
+
+ mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;
public:
- X86TargetMachine(const Target &T, StringRef TT,
- StringRef CPU, StringRef FS, const TargetOptions &Options,
- Reloc::Model RM, CodeModel::Model CM,
- CodeGenOpt::Level OL);
- const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
-
- X86Subtarget *getSubtargetImpl() {
- return static_cast<X86Subtarget *>(TargetMachine::getSubtargetImpl());
- }
+ X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL);
+ ~X86TargetMachine() override;
+ const X86Subtarget *getSubtargetImpl(const Function &F) const override;
- /// \brief Register X86 analysis passes with a pass manager.
- void addAnalysisPasses(PassManagerBase &PM) override;
+ TargetIRAnalysis getTargetIRAnalysis() override;
// Set up the pass pipeline.
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
-
- bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
+ TargetLoweringObjectFile *getObjFileLowering() const override {
+ return TLOF.get();
+ }
};
} // End llvm namespace