#include "X86.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
-#include "llvm/CodeGen/IntrinsicLowering.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/ADT/Statistic.h"
+#include <iostream>
using namespace llvm;
-X86VectorEnum llvm::X86Vector = NoSSE;
-
/// X86TargetMachineModule - Note that this is used on hosts that cannot link
/// in a library unless there are references into the library. In particular,
/// it seems that it is not possible to get things to work on Win32 without
int X86TargetMachineModule = 0;
namespace {
- cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
- cl::desc("Disable the ssa-based peephole optimizer "
- "(defaults to disabled)"));
cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
-
-#if 0
- // FIXME: This should eventually be handled with target triples and
- // subtarget support!
- cl::opt<X86VectorEnum, true>
- SSEArg(
- cl::desc("Enable SSE support in the X86 target:"),
- cl::values(
- clEnumValN(SSE, "sse", " Enable SSE support"),
- clEnumValN(SSE2, "sse2", " Enable SSE and SSE2 support"),
- clEnumValN(SSE3, "sse3", " Enable SSE, SSE2, and SSE3 support"),
- clEnumValEnd),
- cl::location(X86Vector), cl::init(NoSSE));
-#endif
-
// Register the target.
RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
}
/// X86TargetMachine ctor - Create an ILP32 architecture model
///
-X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *IL)
- : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
- FrameInfo(TargetFrameInfo::StackGrowsDown, 8, -4),
- JITInfo(*this) {
+X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS)
+ : TargetMachine("X86"),
+ Subtarget(M, FS),
+ DataLayout("e-p:32:32-d:32-l:32"),
+ FrameInfo(TargetFrameInfo::StackGrowsDown,
+ Subtarget.getStackAlignment(), -4),
+ InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
+ if (getRelocationModel() == Reloc::Default)
+ if (Subtarget.isTargetDarwin())
+ setRelocationModel(Reloc::DynamicNoPIC);
+ else
+ setRelocationModel(Reloc::PIC);
}
// addPassesToEmitFile - We currently use all of the same passes as the JIT
// does to emit statically compiled machine code.
bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType) {
- if (FileType != TargetMachine::AssemblyFile) return true;
+ CodeGenFileType FileType,
+ bool Fast) {
+ if (FileType != TargetMachine::AssemblyFile &&
+ FileType != TargetMachine::ObjectFile) return true;
+
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass(&TLInfo));
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
- // Default to pattern ISel
- if (PatternISelTriState == 0)
- PM.add(createX86SimpleInstructionSelector(*this));
- else
- PM.add(createX86PatternInstructionSelector(*this));
-
- // Run optional SSA-based machine code optimizations next...
- if (!NoSSAPeephole)
- PM.add(createX86SSAPeepholeOptimizerPass());
+ // Install an instruction selector.
+ PM.add(createX86ISelDag(*this));
// Print the instruction selected machine code...
if (PrintMachineCode)
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
- PM.add(createX86PeepholeOptimizerPass());
-
if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, *this));
if (!DisableOutput)
- PM.add(createX86CodePrinterPass(Out, *this));
+ switch (FileType) {
+ default:
+ assert(0 && "Unexpected filetype here!");
+ case TargetMachine::AssemblyFile:
+ PM.add(createX86CodePrinterPass(Out, *this));
+ break;
+ case TargetMachine::ObjectFile:
+ // FIXME: We only support emission of ELF files for now, this should check
+ // the target triple and decide on the format to write (e.g. COFF on
+ // win32).
+ addX86ELFObjectWriterPass(PM, Out, *this);
+ break;
+ }
// Delete machine code for this function
PM.add(createMachineCodeDeleter());
/// not supported for this target.
///
void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
+ // The JIT should use static relocation model.
+ TM.setRelocationModel(Reloc::Static);
+
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
+
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
- // FIXME: Implement the switch instruction in the instruction selector!
- PM.add(createLowerSwitchPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
- // Default to pattern ISel
- if (PatternISelTriState == 0)
- PM.add(createX86SimpleInstructionSelector(TM));
- else
- PM.add(createX86PatternInstructionSelector(TM));
-
- // Run optional SSA-based machine code optimizations next...
- if (!NoSSAPeephole)
- PM.add(createX86SSAPeepholeOptimizerPass());
-
- // FIXME: Add SSA based peephole optimizer here.
+ // Install an instruction selector.
+ PM.add(createX86ISelDag(TM));
// Print the instruction selected machine code...
if (PrintMachineCode)
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
- PM.add(createX86PeepholeOptimizerPass());
-
if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, TM));
}
+bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
+ MachineCodeEmitter &MCE) {
+ PM.add(createX86CodeEmitterPass(MCE));
+ // Delete machine code for this function
+ PM.add(createMachineCodeDeleter());
+ return false;
+}
projects / oota-llvm.git / blobdiff