another missed SSE optimization

[oota-llvm.git] / lib / Target / X86 / X86RegisterInfo.h

diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index fdab3ee7a0a7779b35852bd5b87c48bf67585bcd..cf83f99963de365857f7b817803a7e1927cbae37 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -22,9 +22,11 @@ namespace llvm {
   class TargetInstrInfo;
   class X86TargetMachine;
 
-struct X86RegisterInfo : public X86GenRegisterInfo {
+class X86RegisterInfo : public X86GenRegisterInfo {
+public:
   X86TargetMachine &TM;
   const TargetInstrInfo &TII;
+
 private:
   /// Is64Bit - Is the target 64-bits.
   bool Is64Bit;
@@ -56,6 +58,9 @@ public:
                     MachineBasicBlock::iterator MI,
                     unsigned DestReg, unsigned SrcReg,
                     const TargetRegisterClass *RC) const;
+ 
+  void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+                     unsigned DestReg, const MachineInstr *Orig) const;
 
   /// foldMemoryOperand - If this target supports it, fold a load or store of
   /// the specified stack slot into the specified machine instruction for the
@@ -67,20 +72,29 @@ public:
                                   unsigned OpNum,
                                   int FrameIndex) const;
 
-  /// getCalleeSaveRegs - Return a null-terminated list of all of the
+  /// getCalleeSavedRegs - Return a null-terminated list of all of the
   /// callee-save registers on this target.
-  const unsigned *getCalleeSaveRegs() const;
+  const unsigned *getCalleeSavedRegs() const;
 
-  /// getCalleeSaveRegClasses - Return a null-terminated list of the preferred
+  /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
   /// register classes to spill each callee-saved register with.  The order and
-  /// length of this list match the getCalleeSaveRegs() list.
-  const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
+  /// length of this list match the getCalleeSavedRegs() list.
+  const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+
+  /// getReservedRegs - Returns a bitset indexed by physical register number
+  /// indicating if a register is a special register that has particular uses and
+  /// should be considered unavailable at all times, e.g. SP, RA. This is used by
+  /// register scavenger to determine what registers are free.
+  BitVector getReservedRegs(const MachineFunction &MF) const;
+
+  bool hasFP(const MachineFunction &MF) const;
 
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator MI) const;
 
-  void eliminateFrameIndex(MachineBasicBlock::iterator MI) const;
+  void eliminateFrameIndex(MachineBasicBlock::iterator MI,
+                           int SPAdj, RegScavenger *RS = NULL) const;
 
   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
 
@@ -90,6 +104,11 @@ public:
   // Debug information queries.
   unsigned getRARegister() const;
   unsigned getFrameRegister(MachineFunction &MF) const;
+  void getInitialFrameState(std::vector<MachineMove> &Moves) const;
+
+  // Exception handling queries.
+  unsigned getEHExceptionRegister() const;
+  unsigned getEHHandlerRegister() const;
 };
 
 // getX86SubSuperRegister - X86 utility function. It returns the sub or super