Support insertps via the intrinsic and add a couple of simple

[oota-llvm.git] / lib / Target / X86 / X86InstrSSE.td

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 5d6ef36414a5d5eccabdedaa7c127578694e8b3d..2c9a064bd44ef003e0580c1e9179e2c86f0c0fe1 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -3590,15 +3590,19 @@ let Constraints = "$src1 = $dst" in {
 
 defm PINSRD      : SS41I_insert32<0x22, "pinsrd">;
 
+// insertps has a few different modes, there's the first two here below which
+// are optimized inserts that won't zero arbitrary elements in the destination
+// vector. The next one matches the intrinsic and could zero arbitrary elements
+// in the target vector.
 let Constraints = "$src1 = $dst" in {
   multiclass SS41I_insertf32<bits<8> opc, string OpcodeStr> {
-    def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
+    def match_rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
                    (ins VR128:$src1, FR32:$src2, i32i8imm:$src3),
                    !strconcat(OpcodeStr, 
                     "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
                    [(set VR128:$dst, 
                      (X86insrtps VR128:$src1, FR32:$src2, imm:$src3))]>, OpSize;
-    def rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
+    def match_rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
                    (ins VR128:$src1, f32mem:$src2, i32i8imm:$src3),
                    !strconcat(OpcodeStr,
                     "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
@@ -3608,6 +3612,14 @@ let Constraints = "$src1 = $dst" in {
   }
 }
 
+let Constraints = "$src1 = $dst" in {
+  def INSERTPSrr : SS4AIi8<0x21, MRMSrcReg, (outs VR128:$dst),
+                          (ins VR128:$src1, VR128:$src2, i32i8imm:$src3),
+                          "insertps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
+                    [(set VR128:$dst, (int_x86_sse41_insertps VR128:$src1, 
+                                                    VR128:$src2, imm:$src3))]>;
+}
+
 defm INSERTPS    : SS41I_insertf32<0x21, "insertps">;
 
 let Defs = [EFLAGS] in {