Don't fold indexed loads into TCRETURNmi64.

[oota-llvm.git] / lib / Target / X86 / X86InstrInfo.td

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index aabb442f741204e539df399ebff8e4d5b47bd0c7..b91f3c0ad450c3a68c2a68f4f972cdae180a5a4a 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -543,6 +543,10 @@ def tls64addr : ComplexPattern<i64, 5, "SelectTLSADDRAddr",
 def tls64baseaddr : ComplexPattern<i64, 5, "SelectTLSADDRAddr",
                                [tglobaltlsaddr], []>;
 
+// Same as addr, but reject addressing modes requiring more than one register.
+def single_reg_addr : ComplexPattern<iPTR, 5, "SelectSingleRegAddr", [],
+                                     [SDNPWantParent]>;
+
 //===----------------------------------------------------------------------===//
 // X86 Instruction Predicate Definitions.
 def HasCMov      : Predicate<"Subtarget->hasCMov()">;