struct X86AddressMode {
enum {
RegBase,
- FrameIndexBase,
+ FrameIndexBase
} BaseType;
union {
unsigned Reg) {
// Because memory references are always represented with four
// values, this adds: Reg, [1, NoReg, 0] to the instruction.
- return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
+ return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
}
///
inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
unsigned Reg, int Offset) {
- return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addReg(Reg).addImm(1).addReg(0).addImm(Offset);
}
/// addRegReg - This function is used to add a memory reference of the form:
/// [Reg + Reg].
inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
unsigned Reg1, unsigned Reg2) {
- return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addSImm(0);
+ return MIB.addReg(Reg1).addImm(1).addReg(Reg2).addImm(0);
}
inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
MIB.addFrameIndex(AM.Base.FrameIndex);
else
assert (0);
- MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
+ MIB.addImm(AM.Scale).addReg(AM.IndexReg);
if (AM.GV)
- return MIB.addGlobalAddress(AM.GV, false, AM.Disp);
+ return MIB.addGlobalAddress(AM.GV, AM.Disp);
else
- return MIB.addSImm(AM.Disp);
+ return MIB.addImm(AM.Disp);
}
/// addFrameReference - This function is used to add a reference to the base of
///
inline const MachineInstrBuilder &
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
- return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addFrameIndex(FI).addImm(1).addReg(0).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
inline const MachineInstrBuilder &
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addConstantPoolIndex(CPI).addImm(1).addReg(0).addImm(Offset);
}
} // End llvm namespace