SmallVector<unsigned, 8> DeadRegs;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg() && MO.isDead())
+ if (MO.isRegister() && MO.isDead())
DeadRegs.push_back(MO.getReg());
}
while (Start != BB.begin() && prior(Start) != PrevI) --Start;
cerr << "Inserted instructions:\n\t";
Start->print(*cerr.stream(), &MF.getTarget());
- while (++Start != next(I));
+ while (++Start != next(I)) {}
}
dumpStack();
);
return -1;
}
-#define ARRAY_SIZE(TABLE) \
- (sizeof(TABLE)/sizeof(TABLE[0]))
-
#ifdef NDEBUG
#define ASSERT_SORTED(TABLE)
#else
#define ASSERT_SORTED(TABLE) \
{ static bool TABLE##Checked = false; \
if (!TABLE##Checked) { \
- assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \
+ assert(TableIsSorted(TABLE, array_lengthof(TABLE)) && \
"All lookup tables must be sorted for efficient access!"); \
TABLE##Checked = true; \
} \
static const TableEntry OpcodeTable[] = {
{ X86::ABS_Fp32 , X86::ABS_F },
{ X86::ABS_Fp64 , X86::ABS_F },
+ { X86::ABS_Fp80 , X86::ABS_F },
{ X86::ADD_Fp32m , X86::ADD_F32m },
{ X86::ADD_Fp64m , X86::ADD_F64m },
{ X86::ADD_Fp64m32 , X86::ADD_F32m },
+ { X86::ADD_Fp80m32 , X86::ADD_F32m },
+ { X86::ADD_Fp80m64 , X86::ADD_F64m },
{ X86::ADD_FpI16m32 , X86::ADD_FI16m },
{ X86::ADD_FpI16m64 , X86::ADD_FI16m },
+ { X86::ADD_FpI16m80 , X86::ADD_FI16m },
{ X86::ADD_FpI32m32 , X86::ADD_FI32m },
{ X86::ADD_FpI32m64 , X86::ADD_FI32m },
+ { X86::ADD_FpI32m80 , X86::ADD_FI32m },
{ X86::CHS_Fp32 , X86::CHS_F },
{ X86::CHS_Fp64 , X86::CHS_F },
+ { X86::CHS_Fp80 , X86::CHS_F },
{ X86::CMOVBE_Fp32 , X86::CMOVBE_F },
{ X86::CMOVBE_Fp64 , X86::CMOVBE_F },
+ { X86::CMOVBE_Fp80 , X86::CMOVBE_F },
{ X86::CMOVB_Fp32 , X86::CMOVB_F },
{ X86::CMOVB_Fp64 , X86::CMOVB_F },
+ { X86::CMOVB_Fp80 , X86::CMOVB_F },
{ X86::CMOVE_Fp32 , X86::CMOVE_F },
{ X86::CMOVE_Fp64 , X86::CMOVE_F },
+ { X86::CMOVE_Fp80 , X86::CMOVE_F },
{ X86::CMOVNBE_Fp32 , X86::CMOVNBE_F },
{ X86::CMOVNBE_Fp64 , X86::CMOVNBE_F },
+ { X86::CMOVNBE_Fp80 , X86::CMOVNBE_F },
{ X86::CMOVNB_Fp32 , X86::CMOVNB_F },
{ X86::CMOVNB_Fp64 , X86::CMOVNB_F },
+ { X86::CMOVNB_Fp80 , X86::CMOVNB_F },
{ X86::CMOVNE_Fp32 , X86::CMOVNE_F },
{ X86::CMOVNE_Fp64 , X86::CMOVNE_F },
+ { X86::CMOVNE_Fp80 , X86::CMOVNE_F },
{ X86::CMOVNP_Fp32 , X86::CMOVNP_F },
{ X86::CMOVNP_Fp64 , X86::CMOVNP_F },
+ { X86::CMOVNP_Fp80 , X86::CMOVNP_F },
{ X86::CMOVP_Fp32 , X86::CMOVP_F },
{ X86::CMOVP_Fp64 , X86::CMOVP_F },
+ { X86::CMOVP_Fp80 , X86::CMOVP_F },
{ X86::COS_Fp32 , X86::COS_F },
{ X86::COS_Fp64 , X86::COS_F },
+ { X86::COS_Fp80 , X86::COS_F },
{ X86::DIVR_Fp32m , X86::DIVR_F32m },
{ X86::DIVR_Fp64m , X86::DIVR_F64m },
{ X86::DIVR_Fp64m32 , X86::DIVR_F32m },
+ { X86::DIVR_Fp80m32 , X86::DIVR_F32m },
+ { X86::DIVR_Fp80m64 , X86::DIVR_F64m },
{ X86::DIVR_FpI16m32, X86::DIVR_FI16m},
{ X86::DIVR_FpI16m64, X86::DIVR_FI16m},
+ { X86::DIVR_FpI16m80, X86::DIVR_FI16m},
{ X86::DIVR_FpI32m32, X86::DIVR_FI32m},
{ X86::DIVR_FpI32m64, X86::DIVR_FI32m},
+ { X86::DIVR_FpI32m80, X86::DIVR_FI32m},
{ X86::DIV_Fp32m , X86::DIV_F32m },
{ X86::DIV_Fp64m , X86::DIV_F64m },
{ X86::DIV_Fp64m32 , X86::DIV_F32m },
+ { X86::DIV_Fp80m32 , X86::DIV_F32m },
+ { X86::DIV_Fp80m64 , X86::DIV_F64m },
{ X86::DIV_FpI16m32 , X86::DIV_FI16m },
{ X86::DIV_FpI16m64 , X86::DIV_FI16m },
+ { X86::DIV_FpI16m80 , X86::DIV_FI16m },
{ X86::DIV_FpI32m32 , X86::DIV_FI32m },
{ X86::DIV_FpI32m64 , X86::DIV_FI32m },
+ { X86::DIV_FpI32m80 , X86::DIV_FI32m },
{ X86::ILD_Fp16m32 , X86::ILD_F16m },
{ X86::ILD_Fp16m64 , X86::ILD_F16m },
+ { X86::ILD_Fp16m80 , X86::ILD_F16m },
{ X86::ILD_Fp32m32 , X86::ILD_F32m },
{ X86::ILD_Fp32m64 , X86::ILD_F32m },
+ { X86::ILD_Fp32m80 , X86::ILD_F32m },
{ X86::ILD_Fp64m32 , X86::ILD_F64m },
{ X86::ILD_Fp64m64 , X86::ILD_F64m },
+ { X86::ILD_Fp64m80 , X86::ILD_F64m },
{ X86::ISTT_Fp16m32 , X86::ISTT_FP16m},
{ X86::ISTT_Fp16m64 , X86::ISTT_FP16m},
+ { X86::ISTT_Fp16m80 , X86::ISTT_FP16m},
{ X86::ISTT_Fp32m32 , X86::ISTT_FP32m},
{ X86::ISTT_Fp32m64 , X86::ISTT_FP32m},
+ { X86::ISTT_Fp32m80 , X86::ISTT_FP32m},
{ X86::ISTT_Fp64m32 , X86::ISTT_FP64m},
{ X86::ISTT_Fp64m64 , X86::ISTT_FP64m},
+ { X86::ISTT_Fp64m80 , X86::ISTT_FP64m},
{ X86::IST_Fp16m32 , X86::IST_F16m },
{ X86::IST_Fp16m64 , X86::IST_F16m },
+ { X86::IST_Fp16m80 , X86::IST_F16m },
{ X86::IST_Fp32m32 , X86::IST_F32m },
{ X86::IST_Fp32m64 , X86::IST_F32m },
+ { X86::IST_Fp32m80 , X86::IST_F32m },
{ X86::IST_Fp64m32 , X86::IST_FP64m },
{ X86::IST_Fp64m64 , X86::IST_FP64m },
+ { X86::IST_Fp64m80 , X86::IST_FP64m },
{ X86::LD_Fp032 , X86::LD_F0 },
{ X86::LD_Fp064 , X86::LD_F0 },
+ { X86::LD_Fp080 , X86::LD_F0 },
{ X86::LD_Fp132 , X86::LD_F1 },
{ X86::LD_Fp164 , X86::LD_F1 },
+ { X86::LD_Fp180 , X86::LD_F1 },
{ X86::LD_Fp32m , X86::LD_F32m },
+ { X86::LD_Fp32m64 , X86::LD_F32m },
+ { X86::LD_Fp32m80 , X86::LD_F32m },
{ X86::LD_Fp64m , X86::LD_F64m },
+ { X86::LD_Fp64m80 , X86::LD_F64m },
+ { X86::LD_Fp80m , X86::LD_F80m },
{ X86::MUL_Fp32m , X86::MUL_F32m },
{ X86::MUL_Fp64m , X86::MUL_F64m },
{ X86::MUL_Fp64m32 , X86::MUL_F32m },
+ { X86::MUL_Fp80m32 , X86::MUL_F32m },
+ { X86::MUL_Fp80m64 , X86::MUL_F64m },
{ X86::MUL_FpI16m32 , X86::MUL_FI16m },
{ X86::MUL_FpI16m64 , X86::MUL_FI16m },
+ { X86::MUL_FpI16m80 , X86::MUL_FI16m },
{ X86::MUL_FpI32m32 , X86::MUL_FI32m },
{ X86::MUL_FpI32m64 , X86::MUL_FI32m },
+ { X86::MUL_FpI32m80 , X86::MUL_FI32m },
{ X86::SIN_Fp32 , X86::SIN_F },
{ X86::SIN_Fp64 , X86::SIN_F },
+ { X86::SIN_Fp80 , X86::SIN_F },
{ X86::SQRT_Fp32 , X86::SQRT_F },
{ X86::SQRT_Fp64 , X86::SQRT_F },
+ { X86::SQRT_Fp80 , X86::SQRT_F },
{ X86::ST_Fp32m , X86::ST_F32m },
{ X86::ST_Fp64m , X86::ST_F64m },
{ X86::ST_Fp64m32 , X86::ST_F32m },
+ { X86::ST_Fp80m32 , X86::ST_F32m },
+ { X86::ST_Fp80m64 , X86::ST_F64m },
+ { X86::ST_FpP80m , X86::ST_FP80m },
{ X86::SUBR_Fp32m , X86::SUBR_F32m },
{ X86::SUBR_Fp64m , X86::SUBR_F64m },
{ X86::SUBR_Fp64m32 , X86::SUBR_F32m },
+ { X86::SUBR_Fp80m32 , X86::SUBR_F32m },
+ { X86::SUBR_Fp80m64 , X86::SUBR_F64m },
{ X86::SUBR_FpI16m32, X86::SUBR_FI16m},
{ X86::SUBR_FpI16m64, X86::SUBR_FI16m},
+ { X86::SUBR_FpI16m80, X86::SUBR_FI16m},
{ X86::SUBR_FpI32m32, X86::SUBR_FI32m},
{ X86::SUBR_FpI32m64, X86::SUBR_FI32m},
+ { X86::SUBR_FpI32m80, X86::SUBR_FI32m},
{ X86::SUB_Fp32m , X86::SUB_F32m },
{ X86::SUB_Fp64m , X86::SUB_F64m },
{ X86::SUB_Fp64m32 , X86::SUB_F32m },
+ { X86::SUB_Fp80m32 , X86::SUB_F32m },
+ { X86::SUB_Fp80m64 , X86::SUB_F64m },
{ X86::SUB_FpI16m32 , X86::SUB_FI16m },
{ X86::SUB_FpI16m64 , X86::SUB_FI16m },
+ { X86::SUB_FpI16m80 , X86::SUB_FI16m },
{ X86::SUB_FpI32m32 , X86::SUB_FI32m },
{ X86::SUB_FpI32m64 , X86::SUB_FI32m },
+ { X86::SUB_FpI32m80 , X86::SUB_FI32m },
{ X86::TST_Fp32 , X86::TST_F },
{ X86::TST_Fp64 , X86::TST_F },
+ { X86::TST_Fp80 , X86::TST_F },
{ X86::UCOM_FpIr32 , X86::UCOM_FIr },
{ X86::UCOM_FpIr64 , X86::UCOM_FIr },
+ { X86::UCOM_FpIr80 , X86::UCOM_FIr },
{ X86::UCOM_Fpr32 , X86::UCOM_Fr },
{ X86::UCOM_Fpr64 , X86::UCOM_Fr },
+ { X86::UCOM_Fpr80 , X86::UCOM_Fr },
};
static unsigned getConcreteOpcode(unsigned Opcode) {
ASSERT_SORTED(OpcodeTable);
- int Opc = Lookup(OpcodeTable, ARRAY_SIZE(OpcodeTable), Opcode);
+ int Opc = Lookup(OpcodeTable, array_lengthof(OpcodeTable), Opcode);
assert(Opc != -1 && "FP Stack instruction not in OpcodeTable!");
return Opc;
}
RegMap[Stack[--StackTop]] = ~0; // Update state
// Check to see if there is a popping version of this instruction...
- int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode());
+ int Opcode = Lookup(PopTable, array_lengthof(PopTable), I->getOpcode());
if (Opcode != -1) {
I->setInstrDescriptor(TII->get(Opcode));
if (Opcode == X86::UCOM_FPPr)
// If we have one _and_ we don't want to pop the operand, duplicate the value
// on the stack instead of moving it. This ensure that popping the value is
// always ok.
- // Ditto FISTTP16m, FISTTP32m, FISTTP64m.
+ // Ditto FISTTP16m, FISTTP32m, FISTTP64m, ST_FpP80m.
//
if (!KillsSrc &&
(MI->getOpcode() == X86::IST_Fp64m32 ||
MI->getOpcode() == X86::IST_Fp64m64 ||
MI->getOpcode() == X86::ISTT_Fp16m64 ||
MI->getOpcode() == X86::ISTT_Fp32m64 ||
- MI->getOpcode() == X86::ISTT_Fp64m64)) {
+ MI->getOpcode() == X86::ISTT_Fp64m64 ||
+ MI->getOpcode() == X86::IST_Fp64m80 ||
+ MI->getOpcode() == X86::ISTT_Fp16m80 ||
+ MI->getOpcode() == X86::ISTT_Fp32m80 ||
+ MI->getOpcode() == X86::ISTT_Fp64m80 ||
+ MI->getOpcode() == X86::ST_FpP80m)) {
duplicateToTop(Reg, 7 /*temp register*/, I);
} else {
moveToTop(Reg, I); // Move to the top of the stack...
if (MI->getOpcode() == X86::IST_FP64m ||
MI->getOpcode() == X86::ISTT_FP16m ||
MI->getOpcode() == X86::ISTT_FP32m ||
- MI->getOpcode() == X86::ISTT_FP64m) {
+ MI->getOpcode() == X86::ISTT_FP64m ||
+ MI->getOpcode() == X86::ST_FP80m) {
assert(StackTop > 0 && "Stack empty??");
--StackTop;
} else if (KillsSrc) { // Last use of operand?
static const TableEntry ForwardST0Table[] = {
{ X86::ADD_Fp32 , X86::ADD_FST0r },
{ X86::ADD_Fp64 , X86::ADD_FST0r },
+ { X86::ADD_Fp80 , X86::ADD_FST0r },
{ X86::DIV_Fp32 , X86::DIV_FST0r },
{ X86::DIV_Fp64 , X86::DIV_FST0r },
+ { X86::DIV_Fp80 , X86::DIV_FST0r },
{ X86::MUL_Fp32 , X86::MUL_FST0r },
{ X86::MUL_Fp64 , X86::MUL_FST0r },
+ { X86::MUL_Fp80 , X86::MUL_FST0r },
{ X86::SUB_Fp32 , X86::SUB_FST0r },
{ X86::SUB_Fp64 , X86::SUB_FST0r },
+ { X86::SUB_Fp80 , X86::SUB_FST0r },
};
// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
static const TableEntry ReverseST0Table[] = {
{ X86::ADD_Fp32 , X86::ADD_FST0r }, // commutative
{ X86::ADD_Fp64 , X86::ADD_FST0r }, // commutative
+ { X86::ADD_Fp80 , X86::ADD_FST0r }, // commutative
{ X86::DIV_Fp32 , X86::DIVR_FST0r },
{ X86::DIV_Fp64 , X86::DIVR_FST0r },
+ { X86::DIV_Fp80 , X86::DIVR_FST0r },
{ X86::MUL_Fp32 , X86::MUL_FST0r }, // commutative
{ X86::MUL_Fp64 , X86::MUL_FST0r }, // commutative
+ { X86::MUL_Fp80 , X86::MUL_FST0r }, // commutative
{ X86::SUB_Fp32 , X86::SUBR_FST0r },
{ X86::SUB_Fp64 , X86::SUBR_FST0r },
+ { X86::SUB_Fp80 , X86::SUBR_FST0r },
};
// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
static const TableEntry ForwardSTiTable[] = {
{ X86::ADD_Fp32 , X86::ADD_FrST0 }, // commutative
{ X86::ADD_Fp64 , X86::ADD_FrST0 }, // commutative
+ { X86::ADD_Fp80 , X86::ADD_FrST0 }, // commutative
{ X86::DIV_Fp32 , X86::DIVR_FrST0 },
{ X86::DIV_Fp64 , X86::DIVR_FrST0 },
+ { X86::DIV_Fp80 , X86::DIVR_FrST0 },
{ X86::MUL_Fp32 , X86::MUL_FrST0 }, // commutative
{ X86::MUL_Fp64 , X86::MUL_FrST0 }, // commutative
+ { X86::MUL_Fp80 , X86::MUL_FrST0 }, // commutative
{ X86::SUB_Fp32 , X86::SUBR_FrST0 },
{ X86::SUB_Fp64 , X86::SUBR_FrST0 },
+ { X86::SUB_Fp80 , X86::SUBR_FrST0 },
};
// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
static const TableEntry ReverseSTiTable[] = {
{ X86::ADD_Fp32 , X86::ADD_FrST0 },
{ X86::ADD_Fp64 , X86::ADD_FrST0 },
+ { X86::ADD_Fp80 , X86::ADD_FrST0 },
{ X86::DIV_Fp32 , X86::DIV_FrST0 },
{ X86::DIV_Fp64 , X86::DIV_FrST0 },
+ { X86::DIV_Fp80 , X86::DIV_FrST0 },
{ X86::MUL_Fp32 , X86::MUL_FrST0 },
{ X86::MUL_Fp64 , X86::MUL_FrST0 },
+ { X86::MUL_Fp80 , X86::MUL_FrST0 },
{ X86::SUB_Fp32 , X86::SUB_FrST0 },
{ X86::SUB_Fp64 , X86::SUB_FrST0 },
+ { X86::SUB_Fp80 , X86::SUB_FrST0 },
};
InstTable = ReverseSTiTable;
}
- int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode());
+ int Opcode = Lookup(InstTable, array_lengthof(ForwardST0Table),
+ MI->getOpcode());
assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!");
// NotTOS - The register which is not on the top of stack...
default: assert(0 && "Unknown SpecialFP instruction!");
case X86::FpGETRESULT32: // Appears immediately after a call returning FP type!
case X86::FpGETRESULT64: // Appears immediately after a call returning FP type!
+ case X86::FpGETRESULT80:
assert(StackTop == 0 && "Stack should be empty after a call!");
pushReg(getFPReg(MI->getOperand(0)));
break;
case X86::FpSETRESULT32:
case X86::FpSETRESULT64:
+ case X86::FpSETRESULT80:
assert(StackTop == 1 && "Stack should have one element on it to return!");
--StackTop; // "Forget" we have something on the top of stack!
break;
case X86::MOV_Fp3232:
case X86::MOV_Fp3264:
case X86::MOV_Fp6432:
- case X86::MOV_Fp6464: {
+ case X86::MOV_Fp6464:
+ case X86::MOV_Fp3280:
+ case X86::MOV_Fp6480:
+ case X86::MOV_Fp8032:
+ case X86::MOV_Fp8064:
+ case X86::MOV_Fp8080: {
unsigned SrcReg = getFPReg(MI->getOperand(1));
unsigned DestReg = getFPReg(MI->getOperand(0));
projects / oota-llvm.git / blobdiff