#include "X86.h"
#include "X86InstrInfo.h"
-#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
#include <algorithm>
+#include <bitset>
using namespace llvm;
#define DEBUG_TYPE "x86-codegen"
if (!FPIsUsed) return false;
Bundles = &getAnalysis<EdgeBundles>();
- TII = MF.getTarget().getInstrInfo();
+ TII = MF.getSubtarget().getInstrInfo();
// Prepare cross-MBB liveness.
bundleCFG(MF);
MachineBasicBlock *Entry = MF.begin();
bool Changed = false;
- for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8> >
- I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed);
- I != E; ++I)
- Changed |= processBasicBlock(MF, **I);
+ for (MachineBasicBlock *BB : depth_first_ext(Entry, Processed))
+ Changed |= processBasicBlock(MF, *BB);
// Process any unreachable blocks in arbitrary order now.
if (MF.size() != Processed.size())
// FP registers used for function return must be consecutive starting at
// FP0.
- assert((STReturns == 0 || isMask_32(STReturns)) && N <= 2);
+ assert(STReturns == 0 || (isMask_32(STReturns) && N <= 2));
for (unsigned I = 0; I < N; ++I)
pushReg(N - I - 1);
}
void FPS::setKillFlags(MachineBasicBlock &MBB) const {
- const TargetRegisterInfo *TRI = MBB.getParent()->getTarget()
- .getRegisterInfo();
+ const TargetRegisterInfo *TRI =
+ MBB.getParent()->getSubtarget().getRegisterInfo();
LivePhysRegs LPR(TRI);
LPR.addLiveOuts(&MBB);
for (MachineBasicBlock::reverse_iterator I = MBB.rbegin(), E = MBB.rend();
I != E; ++I) {
- BitVector Defs(8);
+ if (I->isDebugValue())
+ continue;
+
+ std::bitset<8> Defs;
SmallVector<MachineOperand *, 2> Uses;
MachineInstr &MI = *I;