#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
const TargetInstrDesc *Desc);
void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
AU.addRequired<MachineModuleInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
}
intptr_t PCAdj = 0);
void emitDisplacementField(const MachineOperand *RelocOp, int DispVal,
- intptr_t PCAdj = 0);
+ intptr_t Adj = 0, bool IsPCRel = true);
void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
void emitRegModRMByte(unsigned RegOpcodeField);
IsPIC = TM.getRelocationModel() == Reloc::PIC_;
do {
- DOUT << "JITTing function '" << MF.getFunction()->getName() << "'\n";
+ DEBUG(errs() << "JITTing function '"
+ << MF.getFunction()->getName() << "'\n");
MCE.startFunction(MF);
for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
MBB != E; ++MBB) {
intptr_t PCAdj /* = 0 */,
bool NeedStub /* = false */,
bool Indirect /* = false */) {
- intptr_t RelocCST = 0;
+ intptr_t RelocCST = Disp;
if (Reloc == X86::reloc_picrel_word)
RelocCST = PICBaseOffset;
else if (Reloc == X86::reloc_pcrel_word)
template<class CodeEmitter>
void Emitter<CodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
- int DispVal, intptr_t PCAdj) {
+ int DispVal,
+ intptr_t Adj /* = 0 */,
+ bool IsPCRel /* = true */) {
// If this is a simple integer displacement that doesn't require a relocation,
// emit it now.
if (!RelocOp) {
emitConstant(DispVal, 4);
return;
}
-
+
// Otherwise, this is something that requires a relocation. Emit it as such
// now.
if (RelocOp->isGlobal()) {
// In 64-bit static small code model, we could potentially emit absolute.
- // But it's probably not beneficial.
+ // But it's probably not beneficial. If the MCE supports using RIP directly
+ // do it, otherwise fallback to absolute (this is determined by IsPCRel).
// 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative
// 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute
- unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
+ unsigned rt = Is64BitMode ?
+ (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext)
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
bool NeedStub = isa<Function>(RelocOp->getGlobal());
bool Indirect = gvNeedsNonLazyPtr(*RelocOp, TM);
emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(),
- PCAdj, NeedStub, Indirect);
+ Adj, NeedStub, Indirect);
} else if (RelocOp->isCPI()) {
- unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
+ unsigned rt = Is64BitMode ?
+ (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext)
+ : (IsPCRel ? X86::reloc_picrel_word : X86::reloc_absolute_word);
emitConstPoolAddress(RelocOp->getIndex(), rt,
- RelocOp->getOffset(), PCAdj);
+ RelocOp->getOffset(), Adj);
} else if (RelocOp->isJTI()) {
- unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
- emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj);
+ unsigned rt = Is64BitMode ?
+ (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext)
+ : (IsPCRel ? X86::reloc_picrel_word : X86::reloc_absolute_word);
+ emitJumpTableAddress(RelocOp->getIndex(), rt, Adj);
} else {
- assert(0 && "Unknown value to relocate!");
+ llvm_unreachable("Unknown value to relocate!");
}
}
if (Op3.isGlobal()) {
DispForReloc = &Op3;
} else if (Op3.isCPI()) {
- if (Is64BitMode || IsPIC) {
+ if (!MCE.earlyResolveAddresses() || Is64BitMode || IsPIC) {
DispForReloc = &Op3;
} else {
DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex());
DispVal += Op3.getOffset();
}
} else if (Op3.isJTI()) {
- if (Is64BitMode || IsPIC) {
+ if (!MCE.earlyResolveAddresses() || Is64BitMode || IsPIC) {
DispForReloc = &Op3;
} else {
DispVal += MCE.getJumpTableEntryAddress(Op3.getIndex());
unsigned BaseReg = Base.getReg();
+ // Indicate that the displacement will use an pcrel or absolute reference
+ // by default. MCEs able to resolve addresses on-the-fly use pcrel by default
+ // while others, unless explicit asked to use RIP, use absolute references.
+ bool IsPCRel = MCE.earlyResolveAddresses() ? true : false;
+
// Is a SIB byte needed?
+ // If no BaseReg, issue a RIP relative instruction only if the MCE can
+ // resolve addresses on-the-fly, otherwise use SIB (Intel Manual 2A, table
+ // 2-7) and absolute references.
if ((!Is64BitMode || DispForReloc || BaseReg != 0) &&
- IndexReg.getReg() == 0 &&
- (BaseReg == 0 || BaseReg == X86::RIP ||
- getX86RegNum(BaseReg) != N86::ESP)) {
- if (BaseReg == 0 ||
- BaseReg == X86::RIP) { // Just a displacement?
+ IndexReg.getReg() == 0 &&
+ ((BaseReg == 0 && MCE.earlyResolveAddresses()) || BaseReg == X86::RIP ||
+ (BaseReg != 0 && getX86RegNum(BaseReg) != N86::ESP))) {
+ if (BaseReg == 0 || BaseReg == X86::RIP) { // Just a displacement?
// Emit special case [disp32] encoding
MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
-
- emitDisplacementField(DispForReloc, DispVal, PCAdj);
+ emitDisplacementField(DispForReloc, DispVal, PCAdj, true);
} else {
unsigned BaseRegNo = getX86RegNum(BaseReg);
if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) {
} else {
// Emit the most general non-SIB encoding: [REG+disp32]
MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
- emitDisplacementField(DispForReloc, DispVal, PCAdj);
+ emitDisplacementField(DispForReloc, DispVal, PCAdj, IsPCRel);
}
}
unsigned SS = SSTable[Scale.getImm()];
if (BaseReg == 0) {
- // Handle the SIB byte for the case where there is no base. The
- // displacement has already been output.
+ // Handle the SIB byte for the case where there is no base, see Intel
+ // Manual 2A, table 2-7. The displacement has already been output.
unsigned IndexRegNo;
if (IndexReg.getReg())
IndexRegNo = getX86RegNum(IndexReg.getReg());
- else
- IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
+ else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
+ IndexRegNo = 4;
emitSIBByte(SS, IndexRegNo, 5);
} else {
unsigned BaseRegNo = getX86RegNum(BaseReg);
if (ForceDisp8) {
emitConstant(DispVal, 1);
} else if (DispVal != 0 || ForceDisp32) {
- emitDisplacementField(DispForReloc, DispVal, PCAdj);
+ emitDisplacementField(DispForReloc, DispVal, PCAdj, IsPCRel);
}
}
}
void Emitter<CodeEmitter>::emitInstruction(
const MachineInstr &MI,
const TargetInstrDesc *Desc) {
- DOUT << MI;
+ DEBUG(errs() << MI);
+
+ MCE.processDebugLoc(MI.getDebugLoc());
unsigned Opcode = Desc->Opcode;
case X86II::GS:
MCE.emitByte(0x65);
break;
- default: assert(0 && "Invalid segment!");
+ default: llvm_unreachable("Invalid segment!");
case 0: break; // No segment override!
}
(((Desc->TSFlags & X86II::Op0Mask)-X86II::D8)
>> X86II::Op0Shift));
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: llvm_unreachable("Invalid prefix!");
case 0: break; // No prefix!
}
unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
switch (Opcode) {
default:
- assert(0 && "psuedo instructions should be removed before code emission");
+ llvm_unreachable("psuedo instructions should be removed before code emission");
break;
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
- DOUT << "RawFrm CurOp " << CurOp << "\n";
- DOUT << "isMBB " << MO.isMBB() << "\n";
- DOUT << "isGlobal " << MO.isGlobal() << "\n";
- DOUT << "isSymbol " << MO.isSymbol() << "\n";
- DOUT << "isImm " << MO.isImm() << "\n";
+ DEBUG(errs() << "RawFrm CurOp " << CurOp << "\n");
+ DEBUG(errs() << "isMBB " << MO.isMBB() << "\n");
+ DEBUG(errs() << "isGlobal " << MO.isGlobal() << "\n");
+ DEBUG(errs() << "isSymbol " << MO.isSymbol() << "\n");
+ DEBUG(errs() << "isImm " << MO.isImm() << "\n");
if (MO.isMBB()) {
emitPCRelativeBlockAddress(MO.getMBB());
} else
emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ llvm_unreachable("Unknown RawFrm operand!");
}
}
break;
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
+ if (Opcode == X86::MOV64ri64i32)
+ rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
// This should not occur on Darwin for relocatable objects.
if (Opcode == X86::MOV64ri)
rt = X86::reloc_absolute_dword; // FIXME: add X86II flag?
if (!Desc->isVariadic() && CurOp != NumOps) {
#ifndef NDEBUG
- cerr << "Cannot encode: " << MI << "\n";
+ errs() << "Cannot encode: " << MI << "\n";
#endif
- llvm_unreachable();
+ llvm_unreachable(0);
}
}
-
projects / oota-llvm.git / blobdiff