-//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to Intel assembly -------===//
-//
+//===-- X86AsmPrinter.cpp - Convert X86 LLVM IR to X86 assembly -----------===//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
-// This file contains a printer that converts from our internal representation
-// of machine-dependent LLVM code to Intel-format assembly language. This
-// printer is the output mechanism used by `llc' and `lli -print-machineinstrs'
-// on X86.
+// This file the shared super class printer that converts from our internal
+// representation of machine-dependent LLVM code to Intel and AT&T format
+// assembly language.
+// This printer is the output mechanism used by `llc'.
//
//===----------------------------------------------------------------------===//
-#include "X86.h"
-#include "X86InstrInfo.h"
-#include "X86TargetMachine.h"
+#include "X86AsmPrinter.h"
+#include "X86ATTAsmPrinter.h"
+#include "X86IntelAsmPrinter.h"
+#include "X86MachineFunctionInfo.h"
+#include "X86Subtarget.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
+#include "llvm/Type.h"
#include "llvm/Assembly/Writer.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/Support/CommandLine.h"
-using namespace llvm;
-
-namespace {
- Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
- enum AsmWriterFlavor { att, intel };
-
- cl::opt<AsmWriterFlavor>
- AsmWriterFlavor("x86-asm-syntax",
- cl::desc("Choose style of code to emit from X86 backend:"),
- cl::values(
- clEnumVal(att, " Emit AT&T Style"),
- clEnumVal(intel, " Emit Intel Style"),
- clEnumValEnd),
- cl::init(intel));
-
- struct GasBugWorkaroundEmitter : public MachineCodeEmitter {
- GasBugWorkaroundEmitter(std::ostream& o)
- : O(o), OldFlags(O.flags()), firstByte(true) {
- O << std::hex;
- }
-
- ~GasBugWorkaroundEmitter() {
- O.flags(OldFlags);
- }
-
- virtual void emitByte(unsigned char B) {
- if (!firstByte) O << "\n\t";
- firstByte = false;
- O << ".byte 0x" << (unsigned) B;
- }
-
- // These should never be called
- virtual void emitWord(unsigned W) { assert(0); }
- virtual uint64_t getGlobalValueAddress(GlobalValue *V) { abort(); }
- virtual uint64_t getGlobalValueAddress(const std::string &Name) { abort(); }
- virtual uint64_t getConstantPoolEntryAddress(unsigned Index) { abort(); }
- virtual uint64_t getCurrentPCValue() { abort(); }
- virtual uint64_t forceCompilationOf(Function *F) { abort(); }
-
- private:
- std::ostream& O;
- std::ios::fmtflags OldFlags;
- bool firstByte;
- };
-
- struct X86IntelAsmPrinter : public AsmPrinter {
- X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM) { }
-
- virtual const char *getPassName() const {
- return "X86 Assembly Printer";
- }
-
- /// printInstruction - This method is automatically generated by tablegen
- /// from the instruction set description. This method returns true if the
- /// machine instruction was sufficiently described to print it, otherwise it
- /// returns false.
- bool printInstruction(const MachineInstr *MI);
-
- // This method is used by the tablegen'erated instruction printer.
- void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
- const MachineOperand &MO = MI->getOperand(OpNo);
- if (MO.getType() == MachineOperand::MO_MachineRegister) {
- assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
- } else {
- printOp(MO);
- }
- }
-
- void printCallOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
- }
+#include "llvm/Target/TargetAsmInfo.h"
- void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- switch (VT) {
- default: assert(0 && "Unknown arg size!");
- case MVT::i8: O << "BYTE PTR "; break;
- case MVT::i16: O << "WORD PTR "; break;
- case MVT::i32:
- case MVT::f32: O << "DWORD PTR "; break;
- case MVT::i64:
- case MVT::f64: O << "QWORD PTR "; break;
- case MVT::f80: O << "XWORD PTR "; break;
- }
- printMemReference(MI, OpNo);
- }
-
- void printMachineInstruction(const MachineInstr *MI);
- void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
- void printMemReference(const MachineInstr *MI, unsigned Op);
- void printConstantPool(MachineConstantPool *MCP);
- bool runOnMachineFunction(MachineFunction &F);
- bool doInitialization(Module &M);
- bool doFinalization(Module &M);
- };
-} // end of anonymous namespace
+using namespace llvm;
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description. This should work
-/// regardless of whether the function is in SSA form.
-///
-FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
- if (AsmWriterFlavor != intel) {
- std::cerr << "AT&T syntax not fully implemented yet!\n";
- abort();
+Statistic<> llvm::EmittedInsts("asm-printer",
+ "Number of machine instrs printed");
+
+static X86FunctionInfo calculateFunctionInfo(const Function *F,
+ const TargetData *TD) {
+ X86FunctionInfo Info;
+ uint64_t Size = 0;
+
+ switch (F->getCallingConv()) {
+ case CallingConv::X86_StdCall:
+ Info.setDecorationStyle(StdCall);
+ break;
+ case CallingConv::X86_FastCall:
+ Info.setDecorationStyle(FastCall);
+ break;
+ default:
+ return Info;
}
- return new X86IntelAsmPrinter(o, tm);
-}
-
-
-// Include the auto-generated portion of the assembly writer.
-#include "X86GenIntelAsmWriter.inc"
-
-
-/// printConstantPool - Print to the current output stream assembly
-/// representations of the constants in the constant pool MCP. This is
-/// used to print out constants which have been "spilled to memory" by
-/// the code generator.
-///
-void X86IntelAsmPrinter::printConstantPool(MachineConstantPool *MCP) {
- const std::vector<Constant*> &CP = MCP->getConstants();
- const TargetData &TD = TM.getTargetData();
-
- if (CP.empty()) return;
+ for (Function::const_arg_iterator AI = F->arg_begin(), AE = F->arg_end();
+ AI != AE; ++AI)
+ Size += TD->getTypeSize(AI->getType());
- for (unsigned i = 0, e = CP.size(); i != e; ++i) {
- O << "\t.section .rodata\n";
- emitAlignment(TD.getTypeAlignmentShift(CP[i]->getType()));
- O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t" << CommentString
- << *CP[i] << "\n";
- emitGlobalConstant(CP[i]);
- }
+ // Size should be aligned to DWORD boundary
+ Size = ((Size + 3)/4)*4;
+
+ // We're not supporting tooooo huge arguments :)
+ Info.setBytesToPopOnReturn((unsigned int)Size);
+ return Info;
}
-/// runOnMachineFunction - This uses the printMachineInstruction()
-/// method to print assembly for each instruction.
-///
-bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
- setupMachineFunction(MF);
- O << "\n\n";
-
- // Print out constants referenced by the function
- printConstantPool(MF.getConstantPool());
-
- // Print out labels for the function.
- O << "\t.text\n";
- emitAlignment(4);
- O << "\t.globl\t" << CurrentFnName << "\n";
- O << "\t.type\t" << CurrentFnName << ", @function\n";
- O << CurrentFnName << ":\n";
-
- // Print out code for the function.
- for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
- I != E; ++I) {
- // Print a label for the basic block.
- O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
- << CommentString << " " << I->getBasicBlock()->getName() << "\n";
- for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
- II != E; ++II) {
- // Print the assembly for the instruction.
- O << "\t";
- printMachineInstruction(II);
- }
- }
-
- // We didn't modify anything.
- return false;
-}
-static bool isScale(const MachineOperand &MO) {
- return MO.isImmediate() &&
- (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
- MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
-}
+/// decorateName - Query FunctionInfoMap and use this information for various
+/// name decoration.
+void X86SharedAsmPrinter::decorateName(std::string &Name,
+ const GlobalValue *GV) {
+ const Function *F = dyn_cast<Function>(GV);
+ if (!F) return;
-static bool isMem(const MachineInstr *MI, unsigned Op) {
- if (MI->getOperand(Op).isFrameIndex()) return true;
- if (MI->getOperand(Op).isConstantPoolIndex()) return true;
- return Op+4 <= MI->getNumOperands() &&
- MI->getOperand(Op ).isRegister() && isScale(MI->getOperand(Op+1)) &&
- MI->getOperand(Op+2).isRegister() && MI->getOperand(Op+3).isImmediate();
-}
-
-
-
-void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
- bool elideOffsetKeyword /* = false */) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
- switch (MO.getType()) {
- case MachineOperand::MO_VirtualRegister:
- if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
- }
- // FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
- if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << "%" << RI.get(MO.getReg()).Name;
- else
- O << "%reg" << MO.getReg();
- return;
-
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
- O << (int)MO.getImmedValue();
- return;
- case MachineOperand::MO_MachineBasicBlock: {
- MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
- O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
- << "_" << MBBOp->getNumber () << "\t# "
- << MBBOp->getBasicBlock ()->getName ();
+ // We don't want to decorate non-stdcall or non-fastcall functions right now
+ unsigned CC = F->getCallingConv();
+ if (CC != CallingConv::X86_StdCall && CC != CallingConv::X86_FastCall)
return;
+
+ FMFInfoMap::const_iterator info_item = FunctionInfoMap.find(F);
+
+ const X86FunctionInfo *Info;
+ if (info_item == FunctionInfoMap.end()) {
+ // Calculate apropriate function info and populate map
+ FunctionInfoMap[F] = calculateFunctionInfo(F, TM.getTargetData());
+ Info = &FunctionInfoMap[F];
+ } else {
+ Info = &info_item->second;
}
- case MachineOperand::MO_PCRelativeDisp:
- std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
- abort ();
- return;
- case MachineOperand::MO_GlobalAddress:
- if (!elideOffsetKeyword)
- O << "OFFSET ";
- O << Mang->getValueName(MO.getGlobal());
- return;
- case MachineOperand::MO_ExternalSymbol:
- O << MO.getSymbolName();
- return;
+
+ switch (Info->getDecorationStyle()) {
+ case None:
+ break;
+ case StdCall:
+ if (!F->isVarArg()) // Variadic functions do not receive @0 suffix.
+ Name += '@' + utostr_32(Info->getBytesToPopOnReturn());
+ break;
+ case FastCall:
+ if (!F->isVarArg()) // Variadic functions do not receive @0 suffix.
+ Name += '@' + utostr_32(Info->getBytesToPopOnReturn());
+
+ if (Name[0] == '_') {
+ Name[0] = '@';
+ } else {
+ Name = '@' + Name;
+ }
+ break;
default:
- O << "<unknown operand type>"; return;
+ assert(0 && "Unsupported DecorationStyle");
}
}
-void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op) {
- assert(isMem(MI, Op) && "Invalid memory reference!");
+/// doInitialization
+bool X86SharedAsmPrinter::doInitialization(Module &M) {
+ if (Subtarget->isTargetDarwin()) {
+ const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
+ if (!Subtarget->is64Bit())
+ X86PICStyle = PICStyle::Stub;
- if (MI->getOperand(Op).isFrameIndex()) {
- O << "[frame slot #" << MI->getOperand(Op).getFrameIndex();
- if (MI->getOperand(Op+3).getImmedValue())
- O << " + " << MI->getOperand(Op+3).getImmedValue();
- O << "]";
- return;
- } else if (MI->getOperand(Op).isConstantPoolIndex()) {
- O << "[.CPI" << CurrentFnName << "_"
- << MI->getOperand(Op).getConstantPoolIndex();
- if (MI->getOperand(Op+3).getImmedValue())
- O << " + " << MI->getOperand(Op+3).getImmedValue();
- O << "]";
- return;
+ // Emit initial debug information.
+ DW.BeginModule(&M);
}
- const MachineOperand &BaseReg = MI->getOperand(Op);
- int ScaleVal = MI->getOperand(Op+1).getImmedValue();
- const MachineOperand &IndexReg = MI->getOperand(Op+2);
- int DispVal = MI->getOperand(Op+3).getImmedValue();
-
- O << "[";
- bool NeedPlus = false;
- if (BaseReg.getReg()) {
- printOp(BaseReg);
- NeedPlus = true;
- }
+ return AsmPrinter::doInitialization(M);
+}
- if (IndexReg.getReg()) {
- if (NeedPlus) O << " + ";
- if (ScaleVal != 1)
- O << ScaleVal << "*";
- printOp(IndexReg);
- NeedPlus = true;
- }
+bool X86SharedAsmPrinter::doFinalization(Module &M) {
+ // Note: this code is not shared by the Intel printer as it is too different
+ // from how MASM does things. When making changes here don't forget to look
+ // at X86IntelAsmPrinter::doFinalization().
+ const TargetData *TD = TM.getTargetData();
- if (DispVal) {
- if (NeedPlus)
- if (DispVal > 0)
- O << " + ";
- else {
- O << " - ";
- DispVal = -DispVal;
+ // Print out module-level global variables here.
+ for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
+ I != E; ++I) {
+ if (!I->hasInitializer()) continue; // External global require no code
+
+ // Check to see if this is a special global used by LLVM, if so, emit it.
+ if (EmitSpecialLLVMGlobal(I))
+ continue;
+
+ std::string name = Mang->getValueName(I);
+ Constant *C = I->getInitializer();
+ unsigned Size = TD->getTypeSize(C->getType());
+ unsigned Align = TD->getPreferredAlignmentLog(I);
+
+ if (C->isNullValue() && /* FIXME: Verify correct */
+ (I->hasInternalLinkage() || I->hasWeakLinkage() ||
+ I->hasLinkOnceLinkage() ||
+ (Subtarget->isTargetDarwin() &&
+ I->hasExternalLinkage() && !I->hasSection()))) {
+ if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
+ if (I->hasExternalLinkage()) {
+ O << "\t.globl\t" << name << "\n";
+ O << "\t.zerofill __DATA__, __common, " << name << ", "
+ << Size << ", " << Align;
+ } else {
+ SwitchToDataSection(TAI->getDataSection(), I);
+ if (TAI->getLCOMMDirective() != NULL) {
+ if (I->hasInternalLinkage()) {
+ O << TAI->getLCOMMDirective() << name << "," << Size;
+ if (Subtarget->isTargetDarwin())
+ O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
+ } else
+ O << TAI->getCOMMDirective() << name << "," << Size;
+ } else {
+ if (!Subtarget->isTargetCygwin()) {
+ if (I->hasInternalLinkage())
+ O << "\t.local\t" << name << "\n";
+ }
+ O << TAI->getCOMMDirective() << name << "," << Size;
+ if (TAI->getCOMMDirectiveTakesAlignment())
+ O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
+ }
+ }
+ O << "\t\t" << TAI->getCommentString() << " " << I->getName() << "\n";
+ } else {
+ switch (I->getLinkage()) {
+ case GlobalValue::LinkOnceLinkage:
+ case GlobalValue::WeakLinkage:
+ if (Subtarget->isTargetDarwin()) {
+ O << "\t.globl " << name << "\n"
+ << "\t.weak_definition " << name << "\n";
+ SwitchToDataSection(".section __DATA,__const_coal,coalesced", I);
+ } else if (Subtarget->isTargetCygwin()) {
+ std::string SectionName(".section\t.data$linkonce." +
+ name +
+ ",\"aw\"\n");
+ SwitchToDataSection(SectionName.c_str(), I);
+ O << "\t.globl " << name << "\n"
+ << "\t.linkonce same_size\n";
+ } else {
+ std::string SectionName("\t.section\t.llvm.linkonce.d." +
+ name +
+ ",\"aw\",@progbits\n");
+ SwitchToDataSection(SectionName.c_str(), I);
+ O << "\t.weak " << name << "\n";
+ }
+ break;
+ case GlobalValue::AppendingLinkage:
+ // FIXME: appending linkage variables should go into a section of
+ // their name or something. For now, just emit them as external.
+ case GlobalValue::DLLExportLinkage:
+ DLLExportedGVs.insert(Mang->makeNameProper(I->getName(),""));
+ // FALL THROUGH
+ case GlobalValue::ExternalLinkage:
+ // If external or appending, declare as a global symbol
+ O << "\t.globl " << name << "\n";
+ // FALL THROUGH
+ case GlobalValue::InternalLinkage:
+ SwitchToDataSection(TAI->getDataSection(), I);
+ break;
+ default:
+ assert(0 && "Unknown linkage type!");
}
- O << DispVal;
- }
- O << "]";
-}
-
-/// printMachineInstruction -- Print out a single X86 LLVM instruction
-/// MI in Intel syntax to the current output stream.
-///
-void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
- ++EmittedInsts;
+ EmitAlignment(Align, I);
+ O << name << ":\t\t\t\t" << TAI->getCommentString() << " " << I->getName()
+ << "\n";
+ if (TAI->hasDotTypeDotSizeDirective())
+ O << "\t.size " << name << ", " << Size << "\n";
- // gas bugs:
- //
- // The 80-bit FP store-pop instruction "fstp XWORD PTR [...]" is misassembled
- // by gas in intel_syntax mode as its 32-bit equivalent "fstp DWORD PTR
- // [...]". Workaround: Output the raw opcode bytes instead of the instruction.
- //
- // The 80-bit FP load instruction "fld XWORD PTR [...]" is misassembled by gas
- // in intel_syntax mode as its 32-bit equivalent "fld DWORD PTR
- // [...]". Workaround: Output the raw opcode bytes instead of the instruction.
- //
- // gas intel_syntax mode treats "fild QWORD PTR [...]" as an invalid opcode,
- // saying "64 bit operations are only supported in 64 bit modes." libopcodes
- // disassembles it as "fild DWORD PTR [...]", which is wrong. Workaround:
- // Output the raw opcode bytes instead of the instruction.
- //
- // gas intel_syntax mode treats "fistp QWORD PTR [...]" as an invalid opcode,
- // saying "64 bit operations are only supported in 64 bit modes." libopcodes
- // disassembles it as "fistpll DWORD PTR [...]", which is wrong. Workaround:
- // Output the raw opcode bytes instead of the instruction.
- switch (MI->getOpcode()) {
- case X86::FSTP80m:
- case X86::FLD80m:
- case X86::FILD64m:
- case X86::FISTP64m:
- GasBugWorkaroundEmitter gwe(O);
- X86::emitInstruction(gwe, (X86InstrInfo&)*TM.getInstrInfo(), *MI);
- O << "\t# ";
+ EmitGlobalConstant(C);
+ O << '\n';
+ }
}
-
- // Call the autogenerated instruction printer routines.
- bool Handled = printInstruction(MI);
- if (!Handled) {
- MI->dump();
- assert(0 && "Do not know how to print this instruction!");
- abort();
+
+ // Output linker support code for dllexported globals
+ if (DLLExportedGVs.begin() != DLLExportedGVs.end()) {
+ SwitchToDataSection(".section .drectve", 0);
}
-}
-bool X86IntelAsmPrinter::doInitialization(Module &M) {
- AsmPrinter::doInitialization(M);
- // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
- //
- // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
- // instruction as a reference to the register named sp, and if you try to
- // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
- // before being looked up in the symbol table. This creates spurious
- // `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
- // mode, and decorate all register names with percent signs.
- O << "\t.intel_syntax\n";
- return false;
-}
+ for (std::set<std::string>::iterator i = DLLExportedGVs.begin(),
+ e = DLLExportedGVs.end();
+ i != e; ++i) {
+ O << "\t.ascii \" -export:" << *i << ",data\"\n";
+ }
-// SwitchSection - Switch to the specified section of the executable if we are
-// not already in it!
-//
-static void SwitchSection(std::ostream &OS, std::string &CurSection,
- const char *NewSection) {
- if (CurSection != NewSection) {
- CurSection = NewSection;
- if (!CurSection.empty())
- OS << "\t" << NewSection << "\n";
+ if (DLLExportedFns.begin() != DLLExportedFns.end()) {
+ SwitchToDataSection(".section .drectve", 0);
}
-}
-bool X86IntelAsmPrinter::doFinalization(Module &M) {
- const TargetData &TD = TM.getTargetData();
- std::string CurSection;
+ for (std::set<std::string>::iterator i = DLLExportedFns.begin(),
+ e = DLLExportedFns.end();
+ i != e; ++i) {
+ O << "\t.ascii \" -export:" << *i << "\"\n";
+ }
+
+ if (Subtarget->isTargetDarwin()) {
+ SwitchToDataSection("", 0);
+
+ // Output stubs for dynamically-linked functions
+ unsigned j = 1;
+ for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
+ i != e; ++i, ++j) {
+ SwitchToDataSection(".section __IMPORT,__jump_table,symbol_stubs,"
+ "self_modifying_code+pure_instructions,5", 0);
+ O << "L" << *i << "$stub:\n";
+ O << "\t.indirect_symbol " << *i << "\n";
+ O << "\thlt ; hlt ; hlt ; hlt ; hlt\n";
+ }
- // Print out module-level global variables here.
- for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I)
- if (I->hasInitializer()) { // External global require no code
- O << "\n\n";
- std::string name = Mang->getValueName(I);
- Constant *C = I->getInitializer();
- unsigned Size = TD.getTypeSize(C->getType());
- unsigned Align = TD.getTypeAlignmentShift(C->getType());
+ O << "\n";
+
+ // Output stubs for external and common global variables.
+ if (GVStubs.begin() != GVStubs.end())
+ SwitchToDataSection(
+ ".section __IMPORT,__pointers,non_lazy_symbol_pointers", 0);
+ for (std::set<std::string>::iterator i = GVStubs.begin(), e = GVStubs.end();
+ i != e; ++i) {
+ O << "L" << *i << "$non_lazy_ptr:\n";
+ O << "\t.indirect_symbol " << *i << "\n";
+ O << "\t.long\t0\n";
+ }
- if (C->isNullValue() &&
- (I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
- I->hasWeakLinkage() /* FIXME: Verify correct */)) {
- SwitchSection(O, CurSection, ".data");
- if (I->hasInternalLinkage())
- O << "\t.local " << name << "\n";
-
- O << "\t.comm " << name << "," << TD.getTypeSize(C->getType())
- << "," << (1 << Align);
- O << "\t\t# ";
- WriteAsOperand(O, I, true, true, &M);
- O << "\n";
- } else {
- switch (I->getLinkage()) {
- case GlobalValue::LinkOnceLinkage:
- case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
- // Nonnull linkonce -> weak
- O << "\t.weak " << name << "\n";
- SwitchSection(O, CurSection, "");
- O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
- break;
- case GlobalValue::AppendingLinkage:
- // FIXME: appending linkage variables should go into a section of
- // their name or something. For now, just emit them as external.
- case GlobalValue::ExternalLinkage:
- // If external or appending, declare as a global symbol
- O << "\t.globl " << name << "\n";
- // FALL THROUGH
- case GlobalValue::InternalLinkage:
- if (C->isNullValue())
- SwitchSection(O, CurSection, ".bss");
- else
- SwitchSection(O, CurSection, ".data");
- break;
- }
+ // Emit initial debug information.
+ DW.EndModule();
- emitAlignment(Align);
- O << "\t.type " << name << ",@object\n";
- O << "\t.size " << name << "," << Size << "\n";
- O << name << ":\t\t\t\t# ";
- WriteAsOperand(O, I, true, true, &M);
- O << " = ";
- WriteAsOperand(O, C, false, false, &M);
- O << "\n";
- emitGlobalConstant(C);
- }
- }
+ // Funny Darwin hack: This flag tells the linker that no global symbols
+ // contain code that falls through to other global symbols (e.g. the obvious
+ // implementation of multiple entry points). If this doesn't occur, the
+ // linker can safely perform dead code stripping. Since LLVM never
+ // generates code that does this, it is always safe to set.
+ O << "\t.subsections_via_symbols\n";
+ }
AsmPrinter::doFinalization(M);
return false; // success
}
+
+/// createX86CodePrinterPass - Returns a pass that prints the X86 assembly code
+/// for a MachineFunction to the given output stream, using the given target
+/// machine description.
+///
+FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,
+ X86TargetMachine &tm) {
+ const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
+
+ if (Subtarget->isFlavorIntel()) {
+ return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo());
+ } else {
+ return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo());
+ }
+}