Fold comparisons against a constant nan, and optimize ORD/UNORD

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index fde6bc61081efab61079cf18fddcdca2347bc99e..c7663be01864d812155353283134e1f4c255090e 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,10 +1,10 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file contains the entry points for global functions defined in the x86
@@ -19,43 +19,15 @@
 
 namespace llvm {
 
-class TargetMachine;
+class X86TargetMachine;
+class FunctionPassManager;
 class FunctionPass;
-class IntrinsicLowering;
+class MachineCodeEmitter;
 
-/// createX86SimpleInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
-
-/// createX86ReallySimpleInstructionSelector - This pass converts an LLVM
-/// function into a machine code representation in an even simpler fashion
-/// than above.
-///
-FunctionPass *createX86ReallySimpleInstructionSelector(TargetMachine &TM);
-
-/// createX86PatternInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation using pattern matching and a machine
-/// description file.
-///
-FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM);
-
-/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
-/// specific peephole optimizations.
-///
-FunctionPass *createX86SSAPeepholeOptimizerPass();
-
-/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
-/// optimizations.
-///
-FunctionPass *createX86PeepholeOptimizerPass();
-
-/// createX86FloatingPointKiller - This function returns a pass which
-/// kills every floating point register at the end of each basic block
-/// because our FloatingPointStackifier cannot handle them.
-///
-FunctionPass *createX86FloatingPointKillerPass();
+FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
@@ -65,10 +37,14 @@ FunctionPass *createX86FloatingPointStackifierPass();
 
 /// createX86CodePrinterPass - Returns a pass that prints the X86
 /// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.  This should work
-/// regardless of whether the function is in SSA form.
+/// using the given target machine description.
 ///
-FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
+FunctionPass *createX86CodePrinterPass(std::ostream &o, X86TargetMachine &tm);
+
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
+                                       MachineCodeEmitter &MCE);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -76,11 +52,11 @@ FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+} // End llvm namespace
+
 // Defines symbolic names for X86 registers.  This defines a mapping from
 // register name to register number.
 //
-} // End llvm namespace
-
 #include "X86GenRegisterNames.inc"
 
 // Defines symbolic names for the X86 instructions.