//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file defines the pass which converts floating point instructions from
// virtual registers into register stack instructions.
//
//===----------------------------------------------------------------------===//
+#define DEBUG_TYPE "fp"
#include "X86.h"
#include "X86InstrInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "Support/Debug.h"
#include "Support/Statistic.h"
#include <algorithm>
#include <iostream>
+using namespace llvm;
namespace {
Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
// getSTReg - Return the X86::ST(i) register which contains the specified
// FP<RegNo> register
unsigned getSTReg(unsigned RegNo) const {
- return StackTop - 1 - getSlot(RegNo) + X86::ST0;
+ return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0;
}
// pushReg - Push the specifiex FP<n> register onto the stack
};
}
-Pass *createX86FloatingPointStackifierPass() { return new FPS(); }
+FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
/// register references into FP stack references.
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
++I; // Insert fxch AFTER the instruction
- moveToTop(Reg-X86::FP0, I); // Insert fxch if neccesary
+ moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary
--I; // Move to fxch or old instruction
popStackAfter(I); // Pop the top of the stack, killing value
}
// Efficient Lookup Table Support
//===----------------------------------------------------------------------===//
-struct TableEntry {
- unsigned from;
- unsigned to;
- bool operator<(const TableEntry &TE) const { return from < TE.from; }
- bool operator<(unsigned V) const { return from < V; }
-};
+namespace {
+ struct TableEntry {
+ unsigned from;
+ unsigned to;
+ bool operator<(const TableEntry &TE) const { return from < TE.from; }
+ bool operator<(unsigned V) const { return from < V; }
+ };
+}
static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
for (unsigned i = 0; i != NumEntries-1; ++i)
// element is an instruction, the second is the version which pops.
//
static const TableEntry PopTable[] = {
+ { X86::FADDrST0 , X86::FADDPrST0 },
+
+ { X86::FDIVRrST0, X86::FDIVRPrST0 },
+ { X86::FDIVrST0 , X86::FDIVPrST0 },
+
+ { X86::FISTr16 , X86::FISTPr16 },
+ { X86::FISTr32 , X86::FISTPr32 },
+
+ { X86::FMULrST0 , X86::FMULPrST0 },
+
{ X86::FSTr32 , X86::FSTPr32 },
{ X86::FSTr64 , X86::FSTPr64 },
{ X86::FSTrr , X86::FSTPrr },
- { X86::FISTr16 , X86::FISTPr16 },
- { X86::FISTr32 , X86::FISTPr32 },
- { X86::FADDrST0 , X86::FADDPrST0 },
- { X86::FSUBrST0 , X86::FSUBPrST0 },
{ X86::FSUBRrST0, X86::FSUBRPrST0 },
- { X86::FMULrST0 , X86::FMULPrST0 },
- { X86::FDIVrST0 , X86::FDIVPrST0 },
- { X86::FDIVRrST0, X86::FDIVRPrST0 },
+ { X86::FSUBrST0 , X86::FSUBPrST0 },
- { X86::FUCOMr , X86::FUCOMPr },
{ X86::FUCOMPr , X86::FUCOMPPr },
+ { X86::FUCOMr , X86::FUCOMPr },
};
/// popStackAfter - Pop the current value off of the top of the FP stack after
// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
static const TableEntry ForwardST0Table[] = {
{ X86::FpADD, X86::FADDST0r },
- { X86::FpSUB, X86::FSUBST0r },
- { X86::FpMUL, X86::FMULST0r },
{ X86::FpDIV, X86::FDIVST0r },
+ { X86::FpMUL, X86::FMULST0r },
+ { X86::FpSUB, X86::FSUBST0r },
{ X86::FpUCOM, X86::FUCOMr },
};
// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
static const TableEntry ReverseST0Table[] = {
{ X86::FpADD, X86::FADDST0r }, // commutative
- { X86::FpSUB, X86::FSUBRST0r },
- { X86::FpMUL, X86::FMULST0r }, // commutative
{ X86::FpDIV, X86::FDIVRST0r },
+ { X86::FpMUL, X86::FMULST0r }, // commutative
+ { X86::FpSUB, X86::FSUBRST0r },
{ X86::FpUCOM, ~0 },
};
// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
static const TableEntry ForwardSTiTable[] = {
{ X86::FpADD, X86::FADDrST0 }, // commutative
- { X86::FpSUB, X86::FSUBRrST0 },
- { X86::FpMUL, X86::FMULrST0 }, // commutative
{ X86::FpDIV, X86::FDIVRrST0 },
+ { X86::FpMUL, X86::FMULrST0 }, // commutative
+ { X86::FpSUB, X86::FSUBRrST0 },
{ X86::FpUCOM, X86::FUCOMr },
};
// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
static const TableEntry ReverseSTiTable[] = {
{ X86::FpADD, X86::FADDrST0 },
- { X86::FpSUB, X86::FSUBrST0 },
- { X86::FpMUL, X86::FMULrST0 },
{ X86::FpDIV, X86::FDIVrST0 },
+ { X86::FpMUL, X86::FMULrST0 },
+ { X86::FpSUB, X86::FSUBrST0 },
{ X86::FpUCOM, ~0 },
};
/// handleSpecialFP - Handle special instructions which behave unlike other
-/// floating point instructions. This is primarily inteaded for use by pseudo
+/// floating point instructions. This is primarily intended for use by pseudo
/// instructions.
///
void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
}
I = MBB->erase(I)-1; // Remove the pseudo instruction
+ delete MI;
+}
+
+namespace {
+ struct FPK : public MachineFunctionPass {
+ virtual const char *getPassName() const { return "X86 FP Killer"; }
+ virtual bool runOnMachineFunction(MachineFunction &MF);
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addPreserved<LiveVariables>();
+ AU.addRequired<LiveVariables>();
+ AU.addPreservedID(PHIEliminationID);
+ AU.addRequiredID(PHIEliminationID);
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+ };
+}
+
+FunctionPass *llvm::createX86FloatingPointKillerPass() { return new FPK(); }
+
+bool FPK::runOnMachineFunction(MachineFunction &MF) {
+ const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
+ LiveVariables &LV = getAnalysis<LiveVariables>();
+
+ for (MachineFunction::iterator
+ mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
+ MachineBasicBlock& mbb = *mbbi;
+ MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
+ // rewind to the last non terminating instruction
+ while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode()))
+ ++mii;
+
+ // add implicit def for all virtual floating point registers so that
+ // they are spilled at the end of each basic block, since our
+ // register stackifier doesn't handle them otherwise.
+ MachineInstr* instr = BuildMI(X86::IMPLICIT_DEF, 7)
+ .addReg(X86::FP6, MOTy::Def)
+ .addReg(X86::FP5, MOTy::Def)
+ .addReg(X86::FP4, MOTy::Def)
+ .addReg(X86::FP3, MOTy::Def)
+ .addReg(X86::FP2, MOTy::Def)
+ .addReg(X86::FP1, MOTy::Def)
+ .addReg(X86::FP0, MOTy::Def);
+
+ mbb.insert(mii.base(), instr);
+
+ for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
+ LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
+
+ // force live variables to compute that these registers are dead
+ LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
+ }
+ }
+ return true;
}
projects / oota-llvm.git / blobdiff